Same-Side Rank Topology for Dual-Rank DIMM Signal Integrity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional dual-rank DRAM configurations on opposite sides of a memory module lead to crosstalk issues due to asymmetric stubs and longer via lengths, which can be minimized by placing separate ranks on the same side of the module and connecting them using micro-vias to reduce stub length and improve return loss.

Innovation Solution

Implementing a same-side rank topology where separate ranks are placed on the same side of the memory module or PCB, with micro-vias connecting the I/O package pins to minimize via lengths and symmetrically control stubs, thereby reducing crosstalk and improving signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If separate ranks are placed on opposite sides of the memory module, then the module can accommodate more memory capacity, but crosstalk increases due to asymmetric stubs and longer via lengths

Engineering Contradiction:
Improvememory capacityVSAvoidcrosstalk
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from a traditional opposite-side rank configuration to a same-side rank configuration, utilizing the horizontal plane dimension more effectively. By placing both ranks on the same side of the memory module, the design eliminates asymmetric stub issues and reduces via length, thereby decreasing crosstalk while maintaining high memory capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If micro-vias are used to connect I/O package pins, then via length is reduced and return loss improves, but manufacturing complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the via geometry parameter from conventional vias to micro-vias, which have smaller diameters and shorter lengths. This parameter change reduces via inductance and improves return loss, enhancing signal integrity. Although micro-via fabrication is more complex, the design accepts this trade-off for the significant signal quality improvement.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If separate ranks are placed on the same side of the module, then crosstalk is reduced through symmetric stub control, but the module occupies more lateral space

Engineering Contradiction:
ImprovecrosstalkVSAvoidmodule lateral space
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent utilizes the lateral plane more efficiently by placing both ranks on the same side, accepting increased lateral footprint. This configuration enables symmetric stub control and reduced via length, which significantly decreases crosstalk. The design prioritizes signal quality over compact vertical arrangement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240272823A1Multiple rank drams on a same module side
Publication Date: 2024.08.15 MICRON TECHNOLOGY INC
  • US20240272823A1 patent drawing
  • US20240272823A1 patent drawing
  • US20240272823A1 patent drawing

AI summary

An example apparatus can include a dual-rank dual-inline memory module (DIMM) device. The dual-rank DIMM device can include a plurality of dual-rank memory chip sets and each includes a first-ranked memory chip and a second-ranked memory chip. Each of the plurality of dual-rank memory chip sets can be positioned on a same side of the dual-rank DIMM device.