Differential Sample-and-Hold Amplifier for AC-Coupled Signal Adjustment
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Solution Overview
Problem
Signal processing circuits that handle YPrPb format images require efficient adjustment of alternating current (AC) coupling signals to prevent suppression and distortion of positive and negative signals, which is not effectively addressed by prior technologies.
Innovation Solution
A sample and hold amplifier circuit with positive and negative terminal capacitor arrays, switch arrays, and a differential output circuit that performs gain and offset modifications on input signals to match the requirements of subsequent circuits, using bit capacitors and switch circuits to control polarity and offset voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an efficient adjusting mechanism is absent in signal processing circuits, then the circuit structure remains simple, but the positive and negative signals become suppressed and distorted
Solution Approach 1:
The patent divides the signal adjustment function into separate positive terminal capacitor array and negative terminal capacitor array, each with independent switch arrays. This segmentation allows independent adjustment of positive and negative signals, preventing suppression and distortion while maintaining clear functional boundaries in the circuit structure.
Solution Approach 2:
The patent implements dynamic adjustment capabilities through switch arrays that can selectively connect or disconnect capacitors based on signal requirements. The sampling and holding phases allow the circuit to dynamically adapt its configuration, enabling efficient signal adjustment without permanent structural complexity.
2Manufacturing precision
If AC coupling signals are not properly adjusted, then the circuit operation remains straightforward, but signal distortion and suppression occur in subsequent circuits
Solution Approach 1:
The patent performs signal adjustment in advance during the sampling phase, where capacitors are pre-charged to appropriate voltage levels before the holding phase. This preliminary action ensures that signals are properly conditioned before being passed to subsequent circuits, achieving precise adjustment without adding complexity to the signal path.
Solution Approach 2:
The patent introduces capacitor arrays as intermediary elements between the input signal and subsequent circuits. These capacitors act as mediators that store and transfer signal energy, enabling precise voltage level adjustment and preventing signal distortion without requiring direct complex adjustment mechanisms in the signal path.
Data Source
AI summary
The present disclosure discloses a sample and hold amplifier circuit that includes a positive and a negative terminal capacitor arrays, a positive and a negative terminal switch arrays and a differential output circuit. A second terminal of each of bit capacitors in the positive and the negative terminal capacitor arrays are respectively coupled to a positive and a negative output terminal. In a sampling time period, according to a first connection relation, each of the connected bit capacitors is controlled to receive a polarity input voltage to perform a gain modification. In a holding time period, according to a second connection relation, each of the connected bit capacitors is controlled to receive an offset modification voltage to perform an offset modification. A positive and a negative output voltages are generated at the positive and the negative output terminal to be outputted as a pair of differential output signals by the differential output circuit.