Sample and Hold Circuit for Reducing Row-Wise Temporal Noise in CMOS Imagers
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Solution Overview
Problem
Conventional CMOS imagers suffer from significant row-wise temporal noise during the readout process, which affects the accuracy of pixel signals and introduces residual noise that impacts subsequent columns.
Innovation Solution
The introduction of additional storage circuits in the sample and hold circuit to sample a reference voltage during both reset and integrated charge signal readouts, allowing for noise offset and reduction by using these reference signals during the readout process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional correlated double sampling is used to readout pixel signals, then readout speed is maintained, but row-wise temporal noise significantly degrades signal accuracy
Solution Approach 1:
A reference signal is introduced as an intermediary to mediate between the pixel signals and the noise source. The reference signal is subjected to the same noise effects as the pixel signals but without containing the actual image information. By subtracting the reference signal from the pixel signals, the common-mode row-wise temporal noise is eliminated while preserving the pixel signal integrity.
Solution Approach 2:
The system implements feedback by continuously monitoring the reference signal and using it to compensate for noise in the pixel signals. The reference signal serves as a feedback mechanism that provides real-time noise characterization, allowing the system to dynamically adjust and cancel out row-wise temporal noise during the readout process.
2Reliability
If additional storage circuits are added to sample reference voltages, then noise reduction capability is improved, but device complexity increases
Solution Approach 1:
The sample and hold circuit is segmented into multiple independent storage regions: first storage regions for pixel signals, second storage regions for reference signals, and third storage regions for noise compensation. This segmentation allows each region to be optimized independently and simplifies the overall circuit design by distributing functionality across multiple specialized units rather than one complex unit.
Solution Approach 2:
The additional storage circuits are designed with multi-functionality to minimize their impact on device complexity. The same storage infrastructure is used for both signal and reference voltage storage, and the readout circuitry serves dual purposes by reading both pixel signals and reference signals through a unified architecture. This multi-functionality reduces the need for completely separate dedicated circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces row-wise temporal noise, ensuring that the correlated double sampled signal output is free from significant residual noise, maintaining signal integrity across column outputs.
Implementation Method 1
The photodiode 162 converts incident photons to electrons
Data Source
AI summary
A method and apparatus for reducing temporal row noise by sampling pixel signals and a separate signal representing noise. The pixel signals and noise signals are used in a correlated differential sampling operation.