Sample-and-Hold Circuit Layout for Low-Droop Battery Power
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Solution Overview
Problem
Existing battery-operated systems, such as vehicle systems, face significant power consumption issues due to circuit elements like reference voltage generators remaining active even when the system is turned off, which is undesirable for high-efficiency operation.
Innovation Solution
Implementing a sample and hold circuit with an operational amplifier and capacitors, utilizing a long hold phase and a short sample phase controlled by a clock signal to minimize power consumption, and incorporating PMOS transistors to limit leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If reference voltage generators remain active to maintain steady voltage, then voltage stability is improved, but power consumption increases
Solution Approach 1:
The reference voltage generator operates periodically rather than continuously. A clock signal controls the switching between sample phase (generator active) and hold phase (generator inactive), reducing average power consumption while maintaining voltage stability through the hold circuit that preserves the sampled voltage during the inactive period
Solution Approach 2:
The sample phase performs preliminary action by capturing and storing the reference voltage on capacitors before the generator is turned off. This preliminary voltage capture allows the system to enter the hold phase with the generator inactive, achieving power savings while maintaining voltage stability from the stored charge
2Use of energy by moving object
If hold phase duration is extended to reduce power consumption, then power saving is improved, but voltage droop increases
Solution Approach 1:
The voltage storage function is segmented across multiple capacitors (first capacitor on non-inverting input, second capacitor on inverting input) rather than relying on a single capacitor. This segmentation distributes the storage burden and reduces individual capacitor leakage impact, enabling longer hold phases with minimal voltage droop
Solution Approach 2:
The circuit creates a copied version of the reference voltage on the second capacitor during the sample phase, isolated from the generator. This copied voltage can be held indefinitely without the generator being active, allowing extended hold phases while maintaining voltage stability through the redundancy of the dual-capacitor architecture
Data Source
AI summary
A sample and hold circuit may comprise an operational amplifier including a first op-amp input, a second op-amp input, and an op-amp output. The sample and hold circuit may also include a first switch connected between the first op-amp input and a supply node, a second switch connected between the second op-amp input and the supply node, a first capacitor connected between the first op-amp input and a ground node, a second capacitor connected to the second op-amp input, a third switch connected between the second capacitor and a sample input, and a fourth switch connected between the second capacitor and the op-amp output.