Sample-and-Hold Circuit Mode Switching for RTS Noise Reduction
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Solution Overview
Problem
High-resolution image sensors face significant noise issues due to 1/f noise in MOS transistors, particularly RTS noise, which degrades image quality by introducing random telegraph signals in sample-and-hold circuits.
Innovation Solution
A sample-and-hold circuit that periodically switches between inversion and accumulation modes for the MOS transistor, using switches and a resistor configuration to manage the transistor's operation, reducing noise by interposing accumulation periods between inversion periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a MOS transistor is used in a sample-and-hold circuit for high-resolution image sensing, then the circuit can function properly for signal processing, but RTS noise is generated that degrades image quality
Solution Approach 1:
The patent applies periodic action by switching the MOS transistor between inversion mode and accumulation mode at regular intervals. During accumulation mode, carriers are accumulated in the substrate, and during inversion mode, the transistor functions normally for signal processing. This periodic switching reduces RTS noise by preventing continuous carrier capture and emission events that occur in steady-state inversion mode, while still maintaining the necessary signal processing capability.
Solution Approach 2:
The patent changes the operational parameters of the MOS transistor by modifying its mode of operation between inversion and accumulation. This is achieved by controlling the gate-to-source voltage (VGS) and body-to-source voltage (VBS) to transition the transistor between different operational states. By changing these electrical parameters periodically, the noise characteristics are improved while maintaining functionality.
2Ease of operation
If the MOS transistor operates continuously in inversion mode for signal processing, then the sample-and-hold function is maintained, but low-frequency noise levels remain high
Solution Approach 1:
The patent implements periodic switching between inversion mode (for sample-and-hold function) and accumulation mode (for noise reduction). The transistor is switched to accumulation mode during periods when sampling is not required, and returns to inversion mode when signal processing is needed. This periodic action maintains the sample-and-hold functionality while reducing low-frequency noise through the accumulation periods.
Solution Approach 2:
The patent performs preliminary action by switching the transistor to accumulation mode before returning to inversion mode. During the accumulation mode period, carriers are accumulated in the substrate, which prepares the device for the next inversion mode operation with reduced noise. This preliminary accumulation action occurs in advance of the next signal processing period.
Data Source
AI summary
A sample-and-hold-circuit includes an amplifier transistor, a resistor connected between a source terminal of the amplifier and a voltage, a first switch connected in parallel with the resistor, and a second switch connected between a gate terminal of the amplifier transistor and the voltage. When the first switch is closed and the second switch is open, the amplifier transistor is in an inversion mode; and when the first switch is open and the second switch is closed, the amplifier transistor is in an accumulation mode.