Sample Rate Conversion With Clock Synchronization for Audio Streams
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Solution Overview
Problem
Existing sample rate conversion techniques struggle with achieving satisfactory results, particularly when dealing with audio streams synchronized to independent free-running clocks, leading to audible distortions and synchronization errors, especially in programmable digital environments.
Innovation Solution
A combined universal sample rate converter and sample clock synchronizer architecture that applies to audio samples across various standard frequencies, using polyphase filtering and feedback control to maintain synchronization and adjust sample rates, ensuring accurate playback and minimizing distortions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a frame-based sample rate converter is used, then fixed sample rate conversions can be performed, but phase corrections are not allowed and synchronization errors occur with independent free-running clocks
Solution Approach 1:
The patent implements a dynamic sample rate converter that continuously adjusts its operation based on real-time phase and frequency detection. Unlike fixed frame-based converters, this system can dynamically modify the derived clock ratio Q/P to track variations in input clock characteristics, enabling both reliability through synchronization and adaptability through continuous adjustment capability.
Solution Approach 2:
The system employs a feedback mechanism where a phase detector continuously monitors the phase and frequency difference between input and derived clocks, and adjusts the sample rate conversion parameters accordingly. This feedback loop enables the system to maintain synchronization accuracy while adapting to varying input conditions, resolving the contradiction between fixed operation and phase correction flexibility.
2Ease of manufacture
If a FIFO buffer is used with simple read/write operations, then sample rate conversion can be implemented, but audible noise is produced when read and write rates differ
Solution Approach 1:
The patent introduces a phase detector and control logic as intermediary components between the FIFO buffer operations and the sample rate conversion process. This intermediary system monitors the fill level and rate differences, adjusting the derived clock to minimize rate mismatches, thereby eliminating audible noise while maintaining the simplicity of FIFO-based architecture.
3Measurement precision
If high-precision phase detectors running at high frequencies are used, then phase changes can be detected accurately, but device complexity and memory requirements increase significantly
Solution Approach 1:
The patent applies partial action by using a phase detector that operates at a frequency sufficient to detect relevant phase changes for audio applications, rather than requiring excessively high frequencies. This provides adequate measurement precision for audio while avoiding the prohibitive complexity and memory requirements of ultra-high frequency operation.
4Adaptability or versatility
If sample rate conversion is performed between independent free-running clocks, then audio streams from different sources can be synchronized, but sample deletions occur causing audible clicks or pops
Solution Approach 1:
The system dynamically adjusts the derived clock frequency based on the detected input clock characteristics, enabling seamless adaptation between different free-running clocks. This continuous adjustment prevents the need for sample deletions that would cause audible artifacts, maintaining audio quality continuity while handling versatile clock frequency variations.
Solution Approach 2:
The feedback mechanism continuously monitors the phase and frequency relationship between different clock sources and adjusts the sample rate conversion in real-time. This ensures smooth transitions and prevents sample deletions that would cause clicks or pops, maintaining reliable audio quality while adapting to various independent clock frequencies.
Data Source
AI summary
The architecture for a combined universal sample rate converter and a sample clock synchronizer is presented. The universal sample rate converter can be applied, for example, to audio samples created or mixed using any of the standard audio frequencies in the set H={8, 11.025, 22.05, 44.1, 48, 96, and 192} kHz and played back using any other frequency from the set H. The synchronizer can be used where audio data are streamed or otherwise broadcast from, for example, the Internet, along with a system timestamp, and where this timestamp needs to be matched to the local audio clock for proper play-back. The same synchronizer can also be used for audio/video or video only synchronization.