Sample Rate Converter NCO Timing for Low-Jitter Output
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Solution Overview
Problem
Conventional sample rate converters experience frequency errors and timing jitter due to an input clock running at the input rate, which cannot accurately represent the desired conversion rate and limits output sample timing to the numerically controlled oscillator (NCO) clock rate.
Innovation Solution
The system addresses this by using a clock input at the desired output rate for the NCO register, modifying its contents with specific factors to determine when to fetch and interpolate samples, thereby reducing jitter and improving accuracy by ensuring samples are provided at the correct output rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the NCO is clocked at the input rate to generate output samples, then the device can operate with a single clock, but frequency errors occur when the desired conversion rate cannot be accurately represented with available bits
Solution Approach 1:
The patent segments the sampling process into multiple phases within each output period. Instead of generating one sample per NCO clock cycle, the system performs multiple incremental updates (e.g., 2-4 stages) per output sample, where each stage advances the NCO phase by a fraction of the full range. This segmentation allows the system to achieve higher effective resolution than the physical bit width would normally permit, thereby resolving the frequency accuracy limitation while maintaining the single-clock architecture.
2Speed
If the NCO is clocked at the input rate, then the system can use the input clock directly, but output timing jitter occurs because samples can only be provided at the NCO clock rate
Solution Approach 1:
The patent implements preliminary action by pre-calculating and storing multiple intermediate phase values in lookup tables before they are needed for actual sample generation. The system prepares phase increment values and corresponding output samples in advance, allowing the NCO to transition smoothly between phases without being constrained by the input clock rate. This pre-computation enables timing-precise output sampling independent of the input clock, eliminating jitter while maintaining high-speed operation.
Data Source
AI summary
A sample rate conversion is accomplished by presenting to a numerically controlled oscillator (NCO) register a clock input at the desired output rate; first-modifying the NCO register contents responsive to a first factor; determining when the first modified NCO register contents are in a predetermined range and in response to the first modified NCO register contents not being in the predetermined range, presenting the first modified NCO register contents to the input of the NCO register; second-modifying, responsive to a second factor, the first modified NCO register contents when the first modified NCO register contents are within the predetermined range and presenting it to the input of the NCO register; and fetching samples, in response to the first-modified NCO register contents being in the predetermined range and interpolating them to produce a resultant sample value at the output rate, and in response to the contents not being in the predetermined range to interpolate the previous sample to produce a resultant sample value at the output rate.