Sampled Analog Mixer Architecture to Reduce Multiple PLL Use
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Solution Overview
Problem
Conventional mixers in mobile wireless communication devices require multiple Phase-Locked Loops (PLLs) for multi-carrier aggregation and frequency-division duplexing, leading to increased area and power consumption.
Innovation Solution
A mixer design that uses a scaler with unit cells and clock signals to sample and scale analog input signals, implementing a sinusoidal mixing signal with adjustable frequency, reducing the need for multiple PLLs by employing a differential and quadrature mixer architecture with a lowpass filter configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple PLLs are used for multi-carrier aggregation and frequency-division duplexing, then signal processing capability is improved, but area and power consumption increase
Solution Approach 1:
The patent combines multiple PLL functions into a single PLL by using one mixing signal to control multiple mixer units. Instead of having separate PLLs for each frequency band or carrier, a single PLL generates a mixing signal that is distributed to multiple mixers, allowing them to process different frequency bands simultaneously. This merging approach maintains the signal processing capability for multi-carrier aggregation and frequency-division duplexing while significantly reducing the area occupied by PLL circuits.
Solution Approach 2:
The mixing signal generated by the single PLL is designed to be universal, serving multiple mixer units that handle different frequency bands and carriers. The mixing signal can be frequency-shifted and distributed to various mixers through the switching matrix, enabling one PLL to perform the functions that would traditionally require multiple dedicated PLLs for different frequency bands and duplexing modes.
2Adaptability or versatility
If multiple PLLs are used for multi-carrier aggregation and frequency-division duplexing, then signal processing capability is improved, but power consumption increases
Solution Approach 1:
The patent merges multiple PLL power consumption sources into a single PLL. By using one PLL to generate the mixing signal for multiple mixer units, the power consumption of multiple PLLs is consolidated into a single PLL, significantly reducing the overall power consumption while maintaining the ability to process multiple carriers and frequency bands through the switched mixer network.
Solution Approach 2:
The patent employs time-division multiplexing where the single PLL generates mixing signals that are periodically switched to different mixer units. The switching matrix directs the mixing signal to appropriate mixers at different time intervals, allowing one PLL to service multiple frequency bands and carriers through periodic action, thereby reducing power consumption compared to having continuously operating multiple PLLs.
3Area of stationary object
If a single PLL is used instead of multiple PLLs, then area and power consumption are reduced, but frequency tuning flexibility may be limited
Solution Approach 1:
The patent adds the dimension of time and switching to the frequency tuning mechanism. Instead of relying solely on the PLL's frequency synthesis capability, the system uses a switching matrix to route the mixing signal to different mixer units that are tuned to different frequency bands. This dimensional addition allows a single PLL to achieve the frequency tuning flexibility of multiple PLLs by combining frequency synthesis with time-division signal routing.
Solution Approach 2:
The switching matrix acts as an intermediary between the single PLL and multiple mixer units. It receives the mixing signal from the PLL and directs it to the appropriate mixer based on the required frequency band and carrier. This intermediary component enables the single PLL to maintain frequency tuning flexibility by mediating the signal distribution to multiple frequency-specific mixers.
Data Source
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AI summary
The invention relates to a mixer (100) for generating an analog output signal Χουτ from an analog input signal XIN using a mixing signal having a mixing frequency fMIX, the mixer (100) comprising: a scaler (110) being configured to sample the analog input signal XIN at a plurality of discrete points in time k with a sampling frequency fS to obtain a sampled analog input signal XIN[k] having a continuous signal value, and to generate the analog output signal ΧOUT having a continuous signal value by scaling the sampled analog input signal XIN[k] on the basis of a plurality of scaling coefficients A[k], wherein the scaling coefficients A[k] are a time-discrete representation of the mixing signal.