Sampled-Data Comparator Offset Cancellation With Dynamic Switching
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Solution Overview
Problem
Operational amplifiers in sampled-data circuits face challenges in providing sufficient open-loop gain, low noise, and fast settling times, especially with scaling technologies and low power supply voltages, making it difficult to maintain accurate output voltages in switched-capacitor integrators.
Innovation Solution
The implementation of zero-crossing detectors in switched-capacitor circuits, which use waveform generators and dynamic zero-crossing detection to sample output voltages close to zero, reducing the need for constant operational amplifier performance and minimizing power consumption while maintaining accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If operational amplifiers are used to process signals in switched-capacitor integrators, then accurate output voltage can be obtained, but power consumption increases and it becomes difficult to achieve sufficient open-loop gain, low noise, and fast settling time with scaled technologies
Solution Approach 1:
The patent applies periodic action by using dynamic reference voltage switching based on the clock signal phases. The reference voltage connected to the virtual ground node alternates between two different values (first reference voltage during first clock phase, second reference voltage during second clock phase), enabling the circuit to achieve accurate integration results while reducing the power consumption and performance requirements of the operational amplifier compared to maintaining a constant precise reference voltage throughout the entire operation cycle
Solution Approach 2:
The patent changes the reference voltage parameter dynamically based on clock phases. Instead of using a single fixed reference voltage, the system switches between multiple reference voltage values (first reference voltage and second reference voltage) at different time periods, which allows the operational amplifier to operate with relaxed performance specifications while still achieving accurate output voltage through the periodic correction mechanism
2Measurement precision
If operational amplifiers are designed for fast settling time and high open-loop gain, then accurate integration is achieved, but device complexity and design difficulty increase with scaled technologies
Solution Approach 1:
The patent uses periodic reference voltage switching synchronized with clock phases to correct integration errors. By alternating between first and second reference voltages during different clock phases, the system achieves accurate integration results without requiring the operational amplifier to have extremely high open-loop gain and fast settling time, thereby simplifying the amplifier design in scaled technologies
Solution Approach 2:
The patent introduces dynamic reference voltage switching as an intermediary mechanism to compensate for operational amplifier imperfections. The periodic switching of reference voltages acts as a mediator that corrects integration errors caused by finite open-loop gain and slow settling time, allowing simpler operational amplifiers to achieve accurate integration results
3Measurement precision
If constant reference voltage sources are used in zero-crossing detector circuits, then accurate zero-crossing detection is achieved, but power consumption increases
Solution Approach 1:
The patent applies periodic action by switching the reference voltage connected to the virtual ground node based on clock signal phases. During the first clock phase, a first reference voltage is applied, and during the second clock phase, a second reference voltage is applied. This periodic switching enables accurate zero-crossing detection while reducing the power consumption of the voltage source compared to using a constant high-precision reference voltage throughout the entire operation cycle
Data Source
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AI summary
A comparator based circuit with effective offset cancellation includes first and second amplifiers and an offset capacitor operatively connected to the first and second amplifiers. An offset voltage source generates an offset voltage. A first switch connects the offset voltage source to ground during a first time period. The first amplifier generates an output voltage in response to the first switch connecting the offset voltage source to ground during the first time period. A second switch connects the offset capacitor to ground during a second time period. The first switch disconnects the offset voltage source from ground during a third time period, and the second switch disconnects the offset capacitor from ground during the third time period.