Sampled Analog PLL Loop Filter for Spur and Phase Noise Control
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Solution Overview
Problem
Existing phase locked loop (PLL) circuits face challenges in integrating loop filters due to large capacitor values required for low loop bandwidth, which is not feasible on a silicon die, and suffer from spurious tones in fractional signal multiplication and frequency synthesis, complicating stability analysis and adding noise.
Innovation Solution
A configurable sampled analog loop filter is integrated within the PLL, using charge storage elements coupled by controllable switches and digital control inputs to configure the filter response, reducing the need for external components and mitigating spurious tones through adaptive bandwidth control and higher order filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If external loop filters are used with large capacitor values to achieve low loop bandwidth, then phase noise performance is improved, but device integration becomes infeasible and board area increases
Solution Approach 1:
The patent merges the loop filter functionality directly into the PLL integrated circuit by integrating charge storage elements (capacitors) and switching circuitry on the same silicon die. This consolidation eliminates the need for external discrete filter components, reducing board area while maintaining low loop bandwidth and phase noise performance through carefully designed integrated capacitor values.
2Object-affected harmful factors
If higher order loop filters are used to mitigate spurious tones in fractional frequency synthesis, then spur performance is improved, but device complexity and stability analysis difficulty increase
Solution Approach 1:
The patent implements higher order filtering by segmenting the filter function into multiple cascaded stages within the integrated circuit. Each stage uses charge storage elements and switches to provide individual filtering action, collectively achieving high-order spur mitigation. This segmented approach enables complex filtering functionality while maintaining manageable design and stability analysis through modular architecture.
3Ease of manufacture
If loop filter is integrated within PLL to reduce part count, then manufacturing complexity is reduced, but achieving low loop bandwidth with small capacitor values becomes challenging
Solution Approach 1:
The patent achieves low loop bandwidth with integrated capacitors by changing the operating parameters of the PLL system. This includes adjusting the VCO gain, charge pump current, and sampling frequency to compensate for the smaller capacitor values inherent in integrated implementations. These parameter adjustments maintain the desired loop bandwidth and stability characteristics despite the reduced capacitor sizes compared to external discrete implementations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for reduced part count, improved phase noise performance, and spur mitigation by integrating the loop filter with PLL components, enabling smaller capacitor values and adaptive PLL bandwidth control, while avoiding quantization noise and external filter complexities.
Implementation Method 1
The filter is implemented using charge storage elements coupled by controllable switches
Data Source
AI summary
An integrated circuit implements at least part of a phase locked loop (PLL). The integrated circuit includes a sampled analog loop filter for the PLL. The loop filter includes a first input for receiving a signal representative of a phase difference between a reference clock signal and a first clock signal, a first output for providing a frequency control signal for controlling a frequency of an oscillator, a clock input for accepting a loop timing clock signal for controlling timing of operation of the loop filter, and a digital control input for configuring a response of the loop filter according to a plurality of control values. In some examples, the loop filter includes charge storage elements coupled by controllable switches, and control circuitry for transferring charge among the charge storage elements to yield the configured response of the loop filter.