Dual-Gate Power Supply Circuit for Wide-Frequency Noise Rejection
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Solution Overview
Problem
Existing power supply circuits for noise-sensitive applications, such as image sensors, often have inadequate power supply rejection ratio (PSRR) and limited frequency range, leading to suboptimal image quality due to noise injection.
Innovation Solution
A power supply circuit comprising dual-gate transistor devices with distinct transconductance values for each gate, where the first and third gates are controlled by a closed regulation loop, and the second and fourth gates are controlled by a sampled reference voltage, enabling effective noise rejection and stable power delivery across a wide frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional power supply circuit is used, then the circuit structure is simple, but the power supply rejection ratio (PSRR) is inadequate and noise rejection is poor
Solution Approach 1:
The power supply circuit is segmented into two distinct transistor devices, each with dual gates performing specialized functions. The first transistor device handles closed-loop regulation while the second handles sampled reference voltage control. This segmentation allows each device to be optimized for specific tasks, achieving high PSRR through coordinated operation of multiple specialized components rather than a single complex circuit.
Solution Approach 2:
The circuit employs dynamic control by switching between two operating modes: closed-loop regulation for low-frequency noise rejection and sampled reference voltage control for high-frequency performance. The transconductance values are dynamically managed through gate control, allowing the system to adapt its response characteristics across different frequency ranges, thereby achieving broad-spectrum noise rejection.
2Adaptability or versatility
If a conventional power supply circuit is used, then the circuit is easy to manufacture, but the frequency range coverage is limited
Solution Approach 1:
The circuit achieves wide frequency range coverage by utilizing parameter changes in transistor transconductance. Each transistor device has gates with different transconductance values, allowing the circuit to operate effectively across different frequency ranges. The first transistor device optimizes for low-frequency regulation while the second handles high-frequency signals, creating a broadband power supply solution through parameter optimization rather than complex circuit topologies.
3Object-affected harmful factors
If a power supply circuit with high PSRR is implemented, then noise rejection improves, but the circuit complexity increases
Solution Approach 1:
The circuit merges the functionality of multiple transistor devices into a coordinated system where the first and second transistor devices work together to achieve high noise rejection. By combining closed-loop regulation and sampled reference voltage control in a unified dual-device architecture, the circuit achieves superior PSRR while maintaining reasonable complexity through functional integration rather than separate independent circuits.
Solution Approach 2:
The circuit uses matched transistor pairs where the first and second transistor devices are designed with corresponding structures and parameters. This copying approach allows the circuit to achieve high PSRR through differential operation and matching, where identical or mirrored transistor characteristics cancel out noise and interference, improving noise rejection without proportionally increasing overall circuit complexity.
Data Source
AI summary
In accordance with an embodiment, a power supply circuit includes: a first transistor device comprising a first gate associated with a first transconductance and a second gate associated with a transconductance greater than the first transconductance; and a second transistor device including a third gate associated with a second transconductance and a fourth gate associated with a transconductance greater than the second transconductance. The second transistor device is configured to supply power to at least one load, the first and the third gates are controlled by a closed regulation loop, and the second and the fourth gates are controlled by a sampled reference voltage.


