Sampled-Voltage Relaxation Oscillator for Ultra-Low-Power Clocks
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Solution Overview
Problem
Traditional relaxation oscillators are power-hungry due to the presence of continuous comparators and current sources with high quiescent current, making them unsuitable for low-power applications.
Innovation Solution
A relaxation oscillator design that employs a resistor-capacitor (RC) circuit, a sampling circuit, and a controllable oscillator, which generates an output clock by sampling the voltage difference between voltages set by RC charging and discharging operations, eliminating the need for a power-hungry continuous comparator and high quiescent current source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a continuous comparator and current source are used in the relaxation oscillator, then the output clock can be generated reliably, but the power consumption increases significantly
Solution Approach 1:
The patent replaces the continuous comparator with a periodic sampling mechanism that operates only during specific phases (charging and discharging phases) rather than continuously. The sampling circuit captures voltage differences at discrete moments, enabling reliable clock generation while dramatically reducing power consumption by eliminating continuous operation.
Solution Approach 2:
The patent extracts and removes the continuous comparator component from the traditional relaxation oscillator design. By eliminating this power-hungry continuous operation component and replacing it with periodic sampling, the design achieves reliable functionality with significantly reduced power consumption.
2Speed
If the RC circuit operates at high frequency, then the output clock frequency can be increased, but the power consumption increases
Solution Approach 1:
The RC circuit operates in periodic charging and discharging phases rather than continuously at high frequency. The sampling circuit captures the necessary voltage information during these periodic phases, allowing the system to achieve high output clock frequencies without requiring the RC circuit to operate continuously at high speed, thus reducing power consumption.
Solution Approach 2:
The sampling circuit performs preliminary capture of voltage differences during the charging and discharging phases before the actual clock output is generated. This preliminary action allows the RC circuit to operate at lower frequencies while still providing sufficient information for high-frequency clock generation through the controllable oscillator.
3Use of energy by moving object
If a sampling circuit is introduced to reduce power consumption, then power efficiency improves, but the device complexity increases
Solution Approach 1:
The sampling circuit is merged with the existing RC charging and discharging circuitry, utilizing the same voltage nodes and timing phases already present in the relaxation oscillator. This integration approach reduces overall complexity by sharing components and circuits rather than adding completely separate sampling infrastructure.
Solution Approach 2:
The sampling circuit serves multiple functions: it captures voltage differences during charging phases, captures voltage differences during discharging phases, and provides control signals for the controllable oscillator. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby limiting the increase in overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves ultra-low power consumption by reducing the operational frequency of the RC circuit and sampling circuit, allowing for efficient power management and precise control of the output clock frequency without deviating from the target frequency.
Implementation Method 1
The RC circuit is arranged to perform an RC charging operation to set a first voltage
Implementation Method 2
perform an RC discharging operation to set a second voltage
Data Source
AI summary
A relaxation oscillator includes a resistor-capacitor (RC) circuit, an integration capacitor, a sampling circuit, and a controllable oscillator. The RC circuit performs an RC charging operation to set a first voltage, performs an RC discharging operation to set a second voltage, and performs a reset operation to reset the first voltage to a first reference voltage and reset the second voltage to a second reference voltage. The sampling circuit performs a charge delivery operation to sample a voltage difference between the first voltage and the second voltage, and transfers the voltage difference to the integration capacitor. The controllable oscillator generates an output clock in response to a control input provided by the integration capacitor.


