Clocked Data Sampler Calibration for PVT-Stable Detection
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Solution Overview
Problem
Clocked dynamic integrator/sampler circuits face stability and accuracy issues due to variations in transistor parameters across and within integrated circuits, leading to inconsistencies in data detection across devices and over changing temperature and supply voltage conditions.
Innovation Solution
A static analog calibration circuit is used as a measurement proxy to generate a process-voltage-temperature (PVT)-dependent reference voltage, which adjusts the current through a clocked data sampler, ensuring calibrated operation by comparing PVT-dependent output voltages and adjusting control signals to mitigate these variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If clocked dynamic integrator/sampler circuits are used for high-speed data detection, then productivity is improved, but reliability deteriorates due to stability and accuracy issues from transistor parameter variations
Solution Approach 1:
A static replica circuit is created that duplicates the transistor configuration and topology of the dynamic integrator/sampler circuit. This replica circuit experiences the same PVT variations but operates in a static mode, allowing its output to be used for calibration without affecting the high-speed operation of the main circuit. The replica serves as a proxy to measure and compensate for parameter variations.
Solution Approach 2:
The output of the static replica circuit is fed back to adjust the bias current or voltage of the dynamic integrator/sampler circuit. This feedback mechanism continuously compensates for PVT variations by comparing the replica's output (which reflects the current PVT state) against a reference and adjusting the main circuit's parameters accordingly, thereby maintaining detection accuracy.
2Adaptability or versatility
If transistor parameters are allowed to vary with PVT conditions, then adaptability is improved, but manufacturing precision deteriorates due to inconsistencies across devices
Solution Approach 1:
The static replica circuit copies the exact transistor layout and configuration of the dynamic circuit, ensuring that both circuits experience identical PVT variations. This allows the replica to accurately reflect the state of the main circuit under different conditions, enabling compensation that maintains consistency across devices despite manufacturing variations.
Solution Approach 2:
The bias current or voltage of the dynamic integrator/sampler is dynamically adjusted based on the output of the static replica circuit. By changing these parameters in response to PVT conditions, the circuit adapts to temperature, voltage, and process variations while maintaining consistent performance characteristics across different devices and operating conditions.
3Reliability
If static analog calibration circuit is added to adjust for PVT variations, then reliability is improved, but device complexity increases
Solution Approach 1:
Instead of adding complex dynamic calibration mechanisms, a simple static replica circuit is used that mirrors the transistor configuration of the main circuit. This replica requires minimal additional components and can be implemented using the same transistor types and layouts, thereby reducing the complexity overhead while providing effective calibration.
Solution Approach 2:
The static replica circuit is integrated into the same chip and shares common components with the dynamic integrator/sampler circuit, such as power supply connections and reference voltages. The calibration path is merged with the existing circuit architecture, allowing the replica to serve dual purposes: maintaining accuracy while minimizing additional complexity through shared resources.
Data Source
AI summary
Methods and systems are described for generating a process-voltage-temperature (PVT)-dependent reference voltage at a reference branch circuit based on a reference current obtained via a band gap generator and a common mode voltage input, generating a PVT-dependent output voltage at an output of a static analog calibration circuit responsive to the common mode voltage input and an adjustable current, adjusting the adjustable current through the static analog calibration circuit according to a control signal generated responsive to comparisons of the PVT-dependent output voltage to the PVT-dependent reference voltage, and configuring a clocked data sampler with a PVT-calibrated current by providing the control signal to the clocked data sampler.