Clocked Data Sampler Calibration for PVT-Stable Integration Time
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Solution Overview
Problem
Dynamic clocked sampler circuits face stability and accuracy issues due to variations in transistor parameters such as gate threshold voltage, gain, and channel resistance across different integrated circuit dies and over temperature and supply voltage changes, leading to inconsistent data detection in high-speed communication systems.
Innovation Solution
A static analog calibration circuit is used as a measurement proxy to generate a process-voltage-temperature (PVT)-dependent reference voltage, which adjusts the current through a clocked data sampler, ensuring consistent sampling intervals and mitigating the effects of PVT variations by comparing the output voltage to a reference voltage and generating corrective control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dynamic clocked sampler circuits are used for high-speed data detection, then productivity is improved, but reliability deteriorates due to PVT variations causing instability and accuracy issues
Solution Approach 1:
The patent adjusts the integration time parameter of the clocked data sampler dynamically based on PVT conditions. By changing the integration time parameter in response to PVT variations, the system maintains accurate data detection despite environmental changes, thus improving reliability while preserving high-speed operation
Solution Approach 2:
The patent implements a feedback mechanism where the integration time is continuously adjusted based on detected PVT variations. The system monitors PVT conditions and dynamically modifies the integration time parameter to compensate for variations, creating a closed-loop control system that maintains stable and accurate data detection under varying conditions
2Measurement precision
If integration time is increased to improve sampling accuracy, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The patent makes the integration time dynamic rather than fixed. The integration time is adjusted in real-time based on PVT conditions and signal characteristics, allowing the system to use longer integration times when needed for accuracy and shorter integration times when speed is critical, thus optimizing the trade-off between measurement precision and time loss
3Reliability
If multiple calibration circuits are used to cover all PVT conditions, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent segments the PVT calibration space into discrete regions or conditions. Instead of using a continuous or exhaustive calibration approach, the system divides the PVT operating space into manageable segments and selects appropriate integration time parameters for each segment, reducing the overall system complexity while maintaining comprehensive PVT coverage
Solution Approach 2:
The patent implements a simplified calibration approach that covers the most critical or common PVT conditions rather than attempting to calibrate for every possible condition. By focusing calibration efforts on the most significant PVT variations, the system achieves adequate reliability without the complexity of exhaustive calibration circuits
Data Source
AI summary
Methods and systems are described for generating a process-voltage-temperature (PVT)-dependent reference voltage at a reference branch circuit based on a reference current obtained via a band gap generator and a common mode voltage input, generating a PVT-dependent output voltage at an output of a static analog calibration circuit responsive to the common mode voltage input and an adjustable current, adjusting the adjustable current through the static analog calibration circuit according to a control signal generated responsive to comparisons of the PVT-dependent output voltage to the PVT-dependent reference voltage, and configuring a clocked data sampler with a PVT-calibrated current by providing the control signal to the clocked data sampler.