Sampling Capacitor Pre-Charging for Weak-Signal ADC Accuracy
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Solution Overview
Problem
Current analog-to-digital converters (ADCs) face challenges in accurately converting weakly driven signals without causing excessive voltage drops, which can lead to unwanted events such as system resets.
Innovation Solution
The implementation of a two-stage charging process for the sampling capacitor, where a buffered input signal is used for pre-charging and the unbuffered input signal for final-charging, reduces voltage drops and ensures accurate conversion by minimizing current draw and eliminating potential offsets from buffering elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional ADC charging method is used, then conversion speed is maintained, but excessive voltage drop occurs during conversion of weakly driven signals
Solution Approach 1:
The patent applies preliminary action by pre-charging the sampling capacitor to a known voltage level before the actual conversion process. This initial charging state reduces the voltage drop during weakly driven signal conversion, preventing system resets while maintaining measurement accuracy.
Solution Approach 2:
The charging process is segmented into multiple stages: an initial pre-charge phase followed by the main conversion phase. This segmentation allows the system to first establish a stable voltage baseline, then perform the precise measurement, resolving the contradiction between voltage stability and measurement accuracy.
2Reliability
If buffering element is added to reduce voltage drop, then voltage stability improves, but additional offsets are introduced affecting measurement accuracy
Solution Approach 1:
The patent uses a controlled switch as an intermediary element between the pre-charge voltage source and the sampling capacitor. This intermediary allows precise control of the pre-charge operation without introducing the continuous offsets that would result from using a buffering element throughout the entire conversion process.
Solution Approach 2:
The pre-charge operation is performed as a preliminary action only during initialization, not continuously during conversion. This temporary use of a pre-charge mechanism provides voltage stability when needed without introducing persistent offsets that would degrade measurement accuracy during the actual conversion phase.
3Reliability
If sampling capacitor is pre-charged, then voltage drop during conversion is reduced, but conversion process becomes more complex
Solution Approach 1:
The patent merges the pre-charge function with the existing ADC initialization sequence by using the same control logic and timing mechanisms already present in the converter. This integration adds minimal complexity while achieving voltage stability, as the pre-charge operation utilizes existing control infrastructure rather than requiring entirely separate control circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the likelihood of excessive voltage drops during conversion while maintaining accurate analog-to-digital conversion of weakly driven signals, ensuring reliable digital output without system disruptions.
Implementation Method 1
a buffer coupled to the input, the buffer configured to receive the input signal and generate a buffered input signal
Implementation Method 2
a sampling capacitor, where the pre-charge controller is configured to: apply the buffered input signal to the sampling capacitor
Data Source
AI summary
The embodiments described herein provide analog-to-digital converters and methods that can reduce the likelihood of excessive voltage drop during the conversion of weakly driven signals while still providing the ability to perform an accurate analog-to-digital conversion. In general, the embodiments described herein reduce the likelihood of excessive voltage drop during the conversion of weakly driven signals by pre-charging the sampling capacitor used in the conversion. For example, the embodiments can apply the buffered input signal apply to the sampling capacitor for a first sampling cycle to pre-charge the sampling capacitor, and then directly apply the unbuffered input signal to the sampling capacitor for a second sampling cycle to final-charge the sampling capacitor. With the sampling capacitor charged using the two stage charging, a digital output corresponding to the charge of the sampling capacitor is generated.