Semiconductor Sampling Circuit Impedance Control
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Solution Overview
Problem
Existing electronic sampling systems suffer from signal distortions due to varying switch impedance and sampling jitter, which affect the accuracy of signal representation and processing, especially at higher input signal frequencies and magnitudes.
Innovation Solution
The proposed sampling circuit maintains a substantially constant switch impedance by using a predefined charge to control the sampling switch, minimizing distortion and jitter, and operates with reduced additional circuitry connected to the input terminal to prevent undesirable loading and kick-back signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If additional circuitry is connected to the input terminal to control switch impedance, then switch impedance control is improved, but input terminal loading and kick-back signals increase
Solution Approach 1:
The patent extracts the impedance control function from the input terminal by using a separate control terminal. The switch impedance is controlled by applying control voltages to the control terminal rather than directly to the input terminal, thereby separating the control function from the signal input function and eliminating the harmful loading and kick-back effects at the input terminal.
Solution Approach 2:
The patent introduces a control terminal as an intermediary between the control circuit and the switch. This intermediary allows impedance control to be achieved without directly connecting control circuitry to the input terminal, thus preventing input terminal loading and kick-back signals while maintaining precise impedance control.
2Stability of the object's composition
If switch control voltage is increased to reduce impedance variation, then switch impedance stability is improved, but power consumption increases
Solution Approach 1:
The patent employs dynamic control of switch impedance by applying different control voltages based on the operating state. During the sample state, a first control voltage is applied to achieve low impedance, while during the hold state, a second control voltage is applied to achieve high impedance. This dynamic adjustment optimizes performance while minimizing power consumption by only applying high control voltages when necessary for switching.
Solution Approach 2:
The patent uses periodic switching between sample and hold states with corresponding control voltages. The control circuit periodically applies control voltages to transition the switch between impedance states, achieving stable impedance control throughout the sampling cycle without continuous high power consumption.
3Measurement precision
If sampling switch impedance is reduced for better signal transmission, then signal transmission quality is improved, but sampling jitter increases
Solution Approach 1:
The patent changes the impedance parameter dynamically by applying different control voltages to the switch control terminal. During the sample state, control voltage is adjusted to achieve optimal low impedance for signal transmission, while during the hold state, control voltage is adjusted to achieve high impedance for signal isolation. This parameter optimization minimizes sampling jitter by ensuring clean transitions between states.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces signal distortions and jitter, enhancing the accuracy and quality of the sampled signal across a wider range of input frequencies and magnitudes, while minimizing power consumption and cost.
Implementation Method 1
The impedance of switch 110 can be controlled through a switch impedance control terminal 135, which allows switch 110 to function as an 'open circuit' (i.e., have a relatively large impedance) when an 'OFF' signal is applied to terminal 135, and alternatively, function as a 'short circuit' (i.e., have a relatively low impedance) when an 'ON' signal is applied to terminal 135.
Implementation Method 2
a storage device such as sampling capacitor 120
Data Source
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AI summary
Circuits and methods that improve the performance of electronic sampling systems are provided. Impedances associated with sampling semiconductor switches are maintained substantially constant during sample states, at least in part, by compensating for encountered input signal variations in order to reduce or minimize signal distortion associated with sampled signals that pass through the sampling switch.