Sampling Circuit for Memory Row Hammer Mitigation
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Solution Overview
Problem
Current memory devices face challenges in addressing row hammering, a phenomenon where data is lost due to high activation of specific word lines, leading to inefficient target refresh operations, as existing sampling circuits do not effectively randomize address sampling.
Innovation Solution
An integrated circuit with a sampling control circuit that generates a sampling enable signal by dividing the sampling period into sub-sections based on active commands, comparing an active counting signal with a random signal for each sub-section, allowing for randomized address sampling and improved target refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sampling circuit randomly samples addresses to perform target refresh operations, then the effectiveness of mitigating row hammering is improved, but the periodicity and accuracy of address sampling deteriorate
Solution Approach 1:
The sampling period is divided into multiple sub-sections based on the number of active commands. Each sub-section uses a different number of random signal bits for sampling, creating segmented sampling regions that balance randomness with periodicity. This segmentation allows the system to maintain both the randomization needed for row hammering mitigation and the structured periodicity required for accurate sampling.
Solution Approach 2:
The number of random signal bits used for sampling is dynamically adjusted according to the number of active commands detected during the sampling period. When more active commands are detected, more random bits are used to increase randomness; when fewer active commands are detected, fewer random bits are used to maintain periodicity. This dynamic adaptation resolves the contradiction between randomness and periodicity.
2Reliability
If the number of random signal bits is increased to improve randomization, then the effectiveness of target refresh operation is improved, but the complexity of the sampling circuit increases
Solution Approach 1:
Instead of always using the maximum number of random signal bits, the circuit uses only the necessary number of bits based on the actual number of active commands. This partial action approach provides sufficient randomization for row hammering mitigation while avoiding the unnecessary complexity that would result from always using the maximum number of bits. The circuit complexity is optimized to match the actual randomization requirements.
Data Source
AI summary
An integrated circuit includes a sampling control circuit configured to generate a sampling enable signal by dividing a sampling period into a plurality of sub-sections according to an active counting signal generated by counting a number of inputs of an active signal during the sampling period, and comparing the active counting signal with a random signal for each sub-section; and a sampling circuit configured to sample and store an input address according to the sampling enable signal.


