Sampling PLL with Frequency Multiplier for Fine Frequency Selection
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Solution Overview
Problem
Existing phase locked oscillators are limited in frequency selection, as they can only generate frequencies that are integer multiples of the reference frequency, restricting their application in communication and radar systems.
Innovation Solution
An analog phase locked oscillator design incorporating a sampling phase detector, loop filter, voltage controlled oscillator, and a frequency multiplier in a feedback loop, allowing for discrete phase comparison and enabling frequency multiplication, thereby offering a wider range of output frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sampling phase detector is used for phase locking, then phase noise performance is improved, but frequency selection is limited to integer multiples of the reference frequency
Solution Approach 1:
A frequency divider is introduced as an intermediary component between the VCO and the sampling phase detector. The divider divides the VCO output frequency by an integer N before it reaches the phase detector, allowing the phase detector to operate at a lower frequency while the VCO can operate at higher frequencies. This enables frequency selection beyond simple integer multiples of the reference frequency, as the VCO frequency can be any frequency that, when divided by N, matches the reference frequency or its harmonics.
Solution Approach 2:
The invention changes the operating parameters of the phase-locked loop by introducing a variable division ratio N in the frequency divider. By adjusting N, the system can lock the VCO to different frequency ranges while maintaining the benefits of sampling phase detection. This parameter change allows the same basic circuit architecture to provide both low phase noise and extended frequency selection capability.
2Ease of operation
If a frequency divider is used to divide VCO frequency to reference frequency, then digital phase locking is achieved, but phase noise characteristics deteriorate at higher frequencies
Solution Approach 1:
The sampling phase detector acts as an intermediary that bridges the digital and analog domains. It receives the divided VCO signal and reference frequency, performs phase comparison to generate error signals, and feeds these back to the VCO. This intermediary approach allows digital control while maintaining analog signal integrity, achieving both ease of operation and good phase noise characteristics.
Solution Approach 2:
The invention implements a feedback mechanism where the sampling phase detector continuously compares the phase of the divided VCO output with the reference frequency and generates correction signals. These feedback signals adjust the VCO frequency and phase in real-time, maintaining stable operation and low phase noise even at higher frequencies where digital phase locking alone would deteriorate performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design provides a wider choice of output frequencies with higher resolution, reducing phase noise and enabling finer frequency selection, particularly in the 100MHz - 2.5GHz range, making it suitable for advanced communication and radar applications.
Implementation Method 1
the voltage controlled oscillator comprises an acoustic wave component, for example a surface acoustic wave component
Data Source
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AI summary
There is provided an analog phase locked oscillator comprising a sampling phase detector (2), a loop filter (3), a voltage controlled oscillator (4), a frequency multiplier (7) and a feedback loop (9) where the feedback loop (9) connects the output of said oscillator (4) with the input of said phase detector (2) through said frequency multiplier (7). The sampling phase detector (2) is adapted to perform a discrete phase comparison between a reference frequency (1) and the multiplied feedback signal. The voltage controlled oscillator (4) is adapted to give out a constant frequency at a multiply of the reference frequency (1) divided with the multiplication factor of the multiplier (7).