Sandwich Gate Sampling Transistor for Display Devices

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Solution Overview

Problem

In active-matrix display devices with thin film transistors, the threshold voltage of sampling transistors changes over time, leading to variations in luminance and image quality issues such as streaks and unevenness, due to the short signal writing time and differences in threshold voltage between pixels.

Innovation Solution

The implementation of a sandwich gate structure for sampling transistors, where the gate is on one surface side with an insulating film and a shield on the other, connected to the same potential, helps stabilize the threshold voltage and enhance mobility, reducing power consumption and maintaining consistent luminance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional gate structure is used for sampling transistors, then the device complexity is low, but the threshold voltage changes over time leading to luminance variations and image quality issues

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidgate structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate structure is segmented into two separate gates (first gate and second gate) positioned on opposite surfaces of the semiconductor layer, allowing independent control and stabilization of threshold voltage through dual-gate configuration

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate structure transitions from a single-surface gate to a dual-surface gate configuration, utilizing the third dimension (depth/thickness of semiconductor layer) to place gates on both top and bottom surfaces, thereby stabilizing threshold voltage through symmetric electric field distribution

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If the signal writing time is extended to improve sampling accuracy, then the manufacturing precision improves, but the productivity decreases due to longer writing time per pixel

Engineering Contradiction:
Improvesampling accuracyVSAvoidwriting speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The transistor mobility is enhanced through the dual-gate structure, allowing faster charge transfer and shorter writing time while maintaining sampling accuracy, thus resolving the trade-off between precision and speed

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the threshold voltage stabilizes, then the luminance consistency improves, but the power consumption characteristics change

Engineering Contradiction:
Improveluminance consistencyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The mobility enhancement from the dual-gate structure allows operation at lower voltages while maintaining performance, potentially reducing power consumption alongside improved threshold voltage stability

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8159424B2Display device and electronic apparatus
Publication Date: 2012.04.17 MAGNOLIA BLUE CORP
  • US8159424B2 patent drawing
  • US8159424B2 patent drawing
  • US8159424B2 patent drawing

AI summary

Disclosed herein is a sampling transistor in an embodiment of the present invention is kept at the on-state with a time width shorter than one horizontal cycle, during the period from the rising of a control pulse supplied from a scanner to a scan line WS to the falling of the control pulse, and samples a video signal from a signal line SL to write the video signal to a hold capacitor. The sampling transistor includes the channel region between the source and the drain and has a sandwich gate structure in which a shield that electrically shields the channel region is disposed on the other side of the channel region. This suppresses change in the threshold voltage of the sampling transistor.