3D Sandwich Power Package for Multi-Die Heat and Interconnects
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Solution Overview
Problem
Implementing microelectronic circuits using multiple dies poses a challenge due to the high number of connections required in a conveniently sized package footprint, which complicates heat dissipation and increases costs.
Innovation Solution
A sandwich package structure is employed, where a plurality of dies are bonded to upper and lower direct bonded metal substrates with a lead frame positioned between them, facilitating electrical connections and mechanical spacing while distributing heat across multiple dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If multiple dies are used to implement microelectronic circuits, then heat dissipation and cost are improved, but the number of interconnections increases
Solution Approach 1:
The patent transitions from a planar arrangement to a three-dimensional stacked configuration with upper and lower DBM substrates positioned vertically. Multiple dies are distributed across these substrates in different spatial layers, allowing interconnections to be established through vertical stacking rather than extensive lateral routing, thereby reducing the complexity of interconnections while maintaining effective heat dissipation across multiple dies
2Ease of manufacture
If multiple dies are used to implement microelectronic circuits, then cost is reduced, but the number of interconnections increases
Solution Approach 1:
By stacking DBM substrates vertically with dies distributed across multiple layers, the patent reduces the lateral footprint and simplifies interconnection routing. The vertical arrangement allows for more efficient space utilization and fewer interconnection paths compared to planar configurations, thereby reducing manufacturing complexity and cost while maintaining the benefits of multiple dies
3Area of stationary object
If a compact package footprint is used, then space efficiency is improved, but the number of connections required increases
Solution Approach 1:
The patent employs a vertical stacking architecture with upper and lower DBM substrates positioned at different heights. This three-dimensional arrangement consolidates multiple dies and interconnections into a compact vertical space, significantly reducing the lateral package footprint while managing connection complexity through structured vertical interlayer routing
4Temperature
If dies are distributed across upper and lower substrates, then heat dissipation is improved, but structural complexity increases
Solution Approach 1:
The patent divides the microelectronic system into segmented dies distributed across separate upper and lower DBM substrates. Each substrate-die combination acts as an independent thermal management unit, allowing heat to be dissipated across multiple discrete locations rather than concentrated in a single area, thereby improving overall heat dissipation while maintaining manageable structural complexity through modular segmentation
Data Source
AI summary
A transistor configured for higher power can be constructed using multiple transistor dies coupled in parallel. This approach of distributing power and heat over multiple transistor dies can allow each transistor die to be made smaller, which can be helpful in improving yield. This is especially true for emerging technologies, such as silicon carbide (SiC). Power modules for power conversion may require a plurality of these multi-die transistors in a package. A package that accommodates the numerous connections required for a multi-die power module is disclosed. The package utilizes a lead frame to provide a three-dimensional sandwich structure in which multiple dies are positioned between two direct bonded copper (DBC) substrates.