Self-Aligned Quadruple Patterning Spacer Density
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Solution Overview
Problem
Current semiconductor patterning techniques, such as double patterning and self-aligned double patterning, face challenges in achieving high pattern density without requiring multiple underlying layers, leading to increased costs and process complexity.
Innovation Solution
A method involving conformal spacer deposition and reactive ion etch processes is used to create and transfer spacer patterns, allowing for increased pattern density without the need for multiple underlying layers, utilizing tight process control and advances in RIE etchers and atomic layer deposition techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional double patterning techniques are used to achieve smaller critical dimensions, then feature size is reduced, but process complexity and cost increase due to requiring multiple deposition and etch steps
Solution Approach 1:
The patent combines multiple patterning operations into a single integrated process flow. The self-aligned quadruple patterning (SAQP) methodology merges mandrel formation, spacer deposition, and pattern transfer steps into one cohesive process that achieves higher density patterns without proportionally increasing process complexity
Solution Approach 2:
The patent utilizes the vertical dimension by forming three-dimensional structures such as trenches and fins. By patterning in the vertical dimension and then transferring those patterns laterally, the process achieves higher pattern density without requiring proportional increases in lateral lithographic resolution
2Manufacturing precision
If multiple underlying layers are deposited to achieve higher pattern density, then pattern density increases, but manufacturing cost and process steps increase
Solution Approach 1:
The patent makes existing process tools and equipment perform multiple functions. The same deposition and etch tools used for standard CMOS fabrication are utilized for the SAQP process, eliminating the need for specialized equipment and reducing overall manufacturing cost despite the increased pattern density achievement
Solution Approach 2:
The methodology employs sacrificial mandrels that are temporarily formed, used to define spacer patterns, and then removed. These mandrels are discarded after serving their patterning function, allowing the spacers to become the final pattern elements transferred to the underlying layer
3Manufacturing precision
If advanced patterning techniques like SAQP are implemented, then pattern density increases, but process control difficulty increases due to requirements for patterning uniformity, pulldown, slimming, and gouging control
Solution Approach 1:
The patent incorporates process monitoring and control mechanisms that provide feedback on key parameters such as spacer thickness, etch rate, and pattern dimensions. This feedback enables real-time adjustments to maintain patterning uniformity and control pulldown, slimming, and gouging effects across the wafer
Solution Approach 2:
The methodology systematically varies process parameters such as deposition temperature, etch chemistry composition, and plasma power levels to optimize each step of the SAQP process. By carefully controlling these parameters, the process achieves the required patterning uniformity and minimizes defects while maintaining high pattern density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the achievement of higher pattern densities while reducing the number of required layers, thereby lowering costs and simplifying the process, with improved patterning uniformity, pulldown, slimming, and gouging of structures.
Implementation Method 1
performing a first conformal spacer deposition, the deposition creating a first conformal layer above the patterned layer
Implementation Method 2
performing a first spacer reactive ion etch (RIE) process on the first conformal layer, the RIE process creating a first spacer pattern
Data Source
AI summary
Provided is a method for increasing pattern density of a structure on a substrate using an integration scheme comprising: providing a substrate having a patterned layer comprising a first mandrel and an underlying layer; performing a first conformal spacer deposition creating a first conformal layer; performing a first spacer reactive ion etch (RIE) process on the first conformal layer, creating a first spacer pattern; performing a first mandrel pull process removing the first mandrel; performing a second conformal spacer deposition creating a second conformal layer; performing a second RIE process creating a second spacer pattern, the first spacer pattern acting as a second mandrel; performing a second mandrel pull process removing the first spacer pattern; and transferring the second spacer pattern into the underlying layer; where the integration targets include patterning uniformity, pulldown of structures, slimming of structures, and gouging of the underlying layer.


