SAR ADC Algorithm Switching for Clock-Dependent Accuracy
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing A/D converters face accuracy issues due to clock frequency dependence and self-noise, with conventional successive approximation algorithms failing to maintain accuracy across varying frequencies.
Innovation Solution
Implementing a system that switches between multiple successive approximation algorithms based on clock frequency, using a storage unit to store and select the optimal algorithm for each frequency range, thereby improving accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional successive approximation algorithm is used, then the A/D converter operates at a fixed clock frequency, but the conversion accuracy deteriorates when the clock frequency varies
Solution Approach 1:
The patent implements dynamic selection of successive approximation algorithms based on the actual clock frequency. The control circuit determines the clock frequency range and selects an appropriate algorithm from multiple stored algorithms, allowing the system to adapt its behavior dynamically to maintain accuracy across varying frequencies
Solution Approach 2:
The patent changes the algorithm parameter (which successive approximation algorithm to use) based on the clock frequency parameter. By storing multiple algorithms with different characteristics and selecting the optimal one according to the operating frequency, the system maintains conversion accuracy despite frequency variations
2Adaptability or versatility
If multiple successive approximation algorithms are stored and selected based on clock frequency, then frequency adaptability improves, but the device complexity increases
Solution Approach 1:
The patent segments the frequency range into multiple predetermined ranges, each associated with a specific successive approximation algorithm. This segmentation approach organizes the complexity into manageable sections, where each segment handles a specific frequency band with its optimized algorithm
Solution Approach 2:
The patent performs preliminary organization of multiple successive approximation algorithms in storage, preparing them in advance for different frequency scenarios. The control circuit has pre-established the mapping between frequency ranges and algorithms, eliminating the need for complex real-time analysis during conversion
Data Source
AI summary
According to one embodiment, an A/D converter includes a successive approximation algorithm setting register that stores a plurality of successive approximation algorithms, an algorithm selection unit that selects a predetermined successive approximation algorithm from the plurality of successive approximation algorithms, a control circuit that generates a comparison value based on the selected predetermined successive approximation algorithm, a DAC that generates a comparison voltage from the comparison value, and a comparator that compares an analog input voltage with the comparison voltage. The control circuit generates a comparison value from a result of the comparison made by the comparator based on the selected predetermined successive approximation algorithm, and converts an analog input voltage into a digital signal from the result of the comparison made by the comparator the number of times equal to the number of bits of the digital signal.