SAR ADC Correction Circuit for Capacitive DAC Errors
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Solution Overview
Problem
Successive approximation A/D converters face challenges in achieving high accuracy and efficiency due to capacitance errors in capacitive DACs, which affect the precision of analog-to-digital conversion.
Innovation Solution
The implementation of a successive approximation A/D converter circuit that includes a capacitive D/A converter, a resistive D/A converter, a comparator, a control circuit, and a digital calculating circuit, which generates correction signals to adjust capacitance errors, thereby improving the accuracy of the conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a capacitive D/A converter is used for high-speed conversion, then conversion speed is improved, but capacitance errors reduce measurement precision
Solution Approach 1:
A resistive D/A converter is introduced as an intermediary component to generate a reference voltage that compensates for capacitance errors. The resistive D/A converter produces a correction voltage based on the digital input signal, which is then combined with the capacitive D/A converter output through a summing node, thereby eliminating measurement precision degradation while preserving high-speed conversion capabilities
Solution Approach 2:
The invention changes the operational parameters by using a resistive voltage division network to generate correction voltages that dynamically adjust for capacitance errors. The resistive D/A converter divides a reference voltage into multiple levels according to the digital input code, creating a compensation signal that varies with the input signal to counteract capacitance non-idealities
2Measurement precision
If capacitance errors are corrected using traditional methods, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The resistive D/A converter and capacitive D/A converter are merged into a single integrated circuit structure. Both converters share common components including the capacitor array, switch matrix, and control logic, allowing error correction functionality to be added without proportionally increasing overall device complexity. The shared architecture enables seamless integration of correction mechanisms
Solution Approach 2:
The resistive D/A converter serves multiple functions: it generates the correction voltage for capacitance error compensation, provides a reference voltage for the comparator, and can independently perform D/A conversion. This multi-functionality reduces the need for separate correction circuits and reference voltage generators, thereby limiting the increase in device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the accuracy of analog-to-digital conversion by effectively correcting capacitance errors, leading to improved precision and reliability in A/D conversion.
Implementation Method 1
a capacitive D/A converter which includes a plurality of capacitors for storing charge based on an input voltage supplied to an input node
Implementation Method 2
a resistive D/A converter which generates a voltage based on a second digital signal by voltage division using a resistor string
Implementation Method 3
a comparator which generates a comparison result signal based on the voltage output at the output node
Data Source
AI summary
A successive approximation A/D converter includes a capacitive D/A converter including capacitors, and generates a voltage based on the input voltage and a first digital signal including J bits; a resistive D/A converter that generates a voltage based on a second digital signal; a capacitor that capacity-couples the voltage to an output node; a comparator that generates a result based on the voltage; a control circuit that supplies the first digital signal to the capacitive D/A converter according to the result and outputs a third digital signal indicating a correction and a fourth digital signal including K bits; and a digital calculating circuit that generates the second digital signal including K bits based on the third digital signal and the fourth digital signal, and supplies the second digital signal to the resistive D/A converter, a (J+K) bit digital data is generated based on the input signal.