SAR ADC Circuit Using Capacitive Feedback for Common-Mode Stability
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Solution Overview
Problem
The challenge in amplifier circuits is to effectively adjust the common-mode voltage without adding additional transistors, especially as operating voltages decrease and manufacturing processes change, leading to deviations in common-mode voltage.
Innovation Solution
The proposed circuit includes cascaded p-type and n-type transistors, capacitors, and a control circuit that generates signals to adjust the common-mode voltage by controlling the conductivity of the transistors, thereby maintaining the target common-mode voltage without additional transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional transistors are cascoded to adjust common-mode voltage, then common-mode voltage adjustment capability is improved, but device complexity increases
Solution Approach 1:
The patent changes the operating parameters of existing transistors (gate voltages, channel widths, lengths) to achieve common-mode voltage adjustment without adding transistors. By modifying the parameters of transistors Q1-Q4 and associated capacitors, the circuit adjusts common-mode voltage while maintaining the original transistor count, thus resolving the contradiction between adaptability and device complexity
Solution Approach 2:
The circuit uses its existing components (transistors Q1-Q4, capacitors C1-C4, and resistors) to self-adjust the common-mode voltage through feedback mechanisms. The transistors and capacitors work together to automatically regulate common-mode voltage without requiring external control circuits or additional active devices, enabling the system to serve itself for voltage regulation
2Use of energy by moving object
If operating voltage is reduced to match process advances, then power consumption is reduced, but common-mode voltage stability deteriorates
Solution Approach 1:
The patent implements feedback mechanisms where the output signals from the differential amplifier are fed back through capacitors C3 and C4 to the gates of transistors Q1 and Q2. This feedback loop continuously monitors and adjusts the common-mode voltage to maintain stability even when operating voltage is reduced, thus resolving the contradiction between low power consumption and voltage stability
Solution Approach 2:
The circuit incorporates capacitors C1-C4 that are pre-configured to provide voltage buffering and stabilization. These capacitors are designed with specific values to anticipate and compensate for common-mode voltage variations before they affect circuit performance, ensuring stability under reduced operating conditions
Data Source
AI summary
The application discloses a circuit, including: a positive-terminal p-type transistor; a negative-terminal p-type transistor; a positive-terminal n-type transistor, wherein the positive-terminal p-type transistor and the positive-terminal n-type transistor are cascoded between a first reference voltage and a second reference voltage; a negative-terminal n-type transistor, wherein the negative-terminal p-type transistor and the negative-terminal n-type transistor are cascoded between the first reference voltage and the second reference voltage; a first positive-terminal capacitor, a top plate of the first positive-terminal capacitor is coupled to a gate of the positive-terminal n-type transistor; a first negative-terminal capacitor, a top plate of the first negative-terminal capacitor is coupled to a gate of the negative-terminal n-type transistor; a first control circuit, arranged to generate a first control signal to bottom plates of the first positive-terminal capacitor and the first negative-terminal capacitor according to the positive-terminal output signal, the negative-terminal output signal and the target common mode voltage.