Noise-Shaping SAR ADC Calibration for Stable Coefficients

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Solution Overview

Problem

Noise-shaping SAR ADCs face variations in noise transfer function due to coefficient variations from capacitor matching and amplifier gain variations, leading to reduced noise-shaping effectiveness, accuracy, and input bandwidth limitations.

Innovation Solution

Implementing a technique for testing and calibrating noise-shaping circuitry within SAR ADCs, using programmable/trimmable circuit components and modifications to digital logic to selectively skip conversion processes and utilize VREFH/VREFL switches during testing/calibration, ensuring accurate coefficient calibration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If noise-shaping circuitry is implemented in SAR ADC to improve SNR, then signal-to-noise ratio is improved, but coefficient variations from capacitor matching and amplifier gain variation reduce noise-shaping effectiveness

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidnoise-shaping effectiveness
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements trimming circuitry that allows adjustment of the noise-shaping coefficient to compensate for variations caused by capacitor matching and amplifier gain variations. By changing the coefficient parameter through trimming, the system maintains optimal noise-shaping performance despite manufacturing tolerances.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent incorporates feedback mechanisms where the actual coefficient values are measured and used to adjust the trimming controls. This closed-loop approach ensures that the noise-shaping circuitry maintains effectiveness by continuously compensating for parameter variations.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If noise-shaping coefficients are trimmed to improve accuracy, then ENOB is improved, but additional trimming circuitry and controls increase device complexity

Engineering Contradiction:
Improveeffective number of bitsVSAvoidtrimming circuitry
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements self-trimming mechanisms where the ADC automatically adjusts its own noise-shaping coefficients without requiring external intervention. The trimming circuitry is integrated into the ADC structure, allowing it to self-calibrate and maintain optimal performance.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent combines the trimming controls and circuitry with the existing ADC structure, integrating the coefficient adjustment functionality into the noise-shaping circuitry itself. This merging approach minimizes additional complexity by reusing existing circuit elements where possible.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If oversampling is used to reduce comparator and pre-amplifier noise, then signal-to-noise ratio is improved, but basic oversampling only gains 3 dB per factor of 2 increase in oversampling ratio

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidoversampling ratio
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent implements dynamic noise-shaping that adapts to different operating conditions and input signal characteristics. By dynamically adjusting the noise-shaping coefficient and adapting the filtering characteristics, the system achieves better than 3 dB per factor of 2 improvement in SNR.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent combines multiple noise-reduction techniques including noise-shaping, oversampling, and digital filtering into a composite approach. This combination of methods achieves superior noise reduction performance compared to basic oversampling alone.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS11424754B1Noise-shaping analog-to-digital converter
Publication Date: 2022.08.23 NXP BV
  • US11424754B1 patent drawing
  • US11424754B1 patent drawing
  • US11424754B1 patent drawing

AI summary

Testing of the noise-shaping circuitry within a successive approximation register (“SAR”) analog-to-digital converter (“ADC”) (“SAR ADC”) to ensure it will function as expected, while also providing a method for calibrating the coefficients of the noise-shaping circuitry. Programmable/trimmable circuit component(s) can be used to calibrate the coefficient(s) of the SAR ADC. Digital logic within the SAR engine enables it to selectively skip portions of the ADC conversion process and to use voltage references rather than an analog voltage input signal in sample mode during such test/calibration modes.