SAR ADC Common-Mode Compensation for Power Supply Noise
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Solution Overview
Problem
The operating reliability of successive approximation analog-to-digital converters (SAR ADCs) is compromised due to fluctuations in power supply voltage, leading to deviations in common-mode input voltage that affect conversion accuracy.
Innovation Solution
Incorporating a common-mode voltage compensation module with compensation capacitors and switches that adjust the charge distribution to maintain the common-mode output voltage within a stable range, thereby reducing the impact of power supply noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If power supply voltage is used directly without compensation, then the circuit structure remains simple, but the common-mode input voltage deviates due to power supply fluctuations, affecting conversion accuracy
Solution Approach 1:
The patent introduces a common-mode voltage compensation module as an intermediary component between the power supply and the capacitor arrays. This module includes compensation capacitors and switches that actively adjust the charge distribution to counteract power supply fluctuations, thereby maintaining stable common-mode input voltage without significantly complicating the overall circuit structure
Solution Approach 2:
The compensation module dynamically changes the charge distribution parameters of the capacitor arrays based on power supply voltage variations. By adjusting the amount of charge on each capacitor through controlled switching, the system maintains the common-mode voltage within the compatible range despite changes in power supply conditions
2Stability of the object's composition
If compensation capacitors and switches are added to adjust charge distribution, then the common-mode output voltage stability is improved, but the device complexity increases
Solution Approach 1:
The compensation module serves as an intermediary that isolates the main conversion circuit from power supply fluctuations. By placing compensation capacitors and switches between the power supply and the capacitor arrays, the system achieves voltage stability without requiring fundamental changes to the core conversion architecture
Solution Approach 2:
The patent segments the voltage regulation function into a separate compensation module distinct from the main conversion circuit. This modular approach allows the compensation function to be added independently, improving stability while keeping the overall device complexity manageable through functional separation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively compensates for power supply voltage fluctuations, ensuring the common-mode input voltage remains within a compatible range, thereby enhancing the reliability and accuracy of the analog-to-digital conversion process.
Implementation Method 1
a first terminal of one compensation capacitor Cc connects to the first electric rail and a first terminal of the other compensation capacitor Cc connect to the second electric rail
Data Source
AI summary
An analog-to-digital converter can include: a charge distribution and holding module configured to sample a to-be-converted signal, and to perform subtraction on the to-be-converted signal and a target reference voltage by charge distribution, in order to generate a positive-phase output voltage and a negative-phase output voltage on a first and second electric rails, respectively; a common-mode voltage compensation module coupled with the first and second electric rails, and being configured to inject common-mode charges to compensate the distributed charges of the charge distribution and holding module, and to reduce a difference between a common-mode output voltage of the charge distribution and holding module and an expected value; and a comparator configured to provide a logic signal based on a comparison between the positive-phase output voltage and the negative-phase output voltage, where the logic signal corresponds to a target digital signal of the analog-to-digital converter.