SAR ADC Comparator Layout Without Common-Mode Voltage
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Solution Overview
Problem
The design of successive approximation analog-to-digital converters (ADCs) faces challenges due to the high requirement for common mode voltage, which increases design complexity and affects precision.
Innovation Solution
The proposed solution involves a successive approximation analog-to-digital converter that eliminates the need for a common mode voltage by optimizing the structure of the D/A converter and comparator, allowing the D/A conversion circuit to adjust the first voltage signal based on the comparison result from the comparator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a common mode voltage is used in the prior art comparator and DAC capacitor array control, then the ADC can perform conversion, but the design difficulty increases and DC accuracy is influenced
Solution Approach 1:
The patent extracts and eliminates the common mode voltage component from the ADC system by using a differential comparator that directly compares the sampling signal with the DAC output signal. The comparator inputs are configured such that one receives the sampling signal and the other receives the DAC output, removing the need for common mode voltage generation and control circuits, thereby reducing design complexity while maintaining conversion functionality
Solution Approach 2:
Instead of using a traditional single-ended comparator that requires common mode voltage, the patent inverts the approach by using a differential comparator configuration where the sampling signal and DAC output signal are directly applied to the two input terminals. This inversion eliminates the common mode voltage requirement and reduces the number of control switches needed in the DAC capacitor array
2Reliability
If a common mode voltage is used in the prior art comparator and DAC capacitor array control, then the ADC can perform conversion, but the precision is influenced
Solution Approach 1:
The patent extracts and eliminates the common mode voltage component from the ADC system by using a differential comparator that directly compares the sampling signal with the DAC output signal. The comparator inputs are configured such that one receives the sampling signal and the other receives the DAC output, removing the need for common mode voltage generation and control circuits, thereby reducing design complexity while maintaining conversion functionality
Solution Approach 2:
The patent implements a feedback mechanism where the comparator output is fed back to the logic control module, which then controls the DAC capacitor array switches to adjust the DAC output signal. This closed-loop feedback ensures that the DAC output closely tracks the sampling signal, improving DC accuracy by eliminating errors that would otherwise be introduced by common mode voltage variations
Data Source
AI summary
An analog-to-digital converter includes a D/A conversion circuit, a comparator, and a logic control module. An input signal is sampled and held to obtain a sampling signal. The D/A conversion circuit receives the sampling signal and a reference voltage signal, and an output terminal of the D/A conversion circuit outputs a first voltage signal. The output terminal of the D/A conversion circuit is coupled to at least one input terminal of the comparator. An output terminal of the comparator is coupled to an input terminal of the logic control module, and the logic control module controls the D/A conversion circuit to adjust the first voltage signal according to a comparison result of the comparator. When the number of comparisons of the comparator reaches preset digits of the D/A conversion circuit, a data output terminal of the logic control module outputs a data signal corresponding to the input signal.