SAR ADC Comparator Reuse for Residue Amplification and Noise Shaping
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Solution Overview
Problem
SAR ADCs face challenges in noise performance and power consumption due to the dominant role of comparator circuits, with active noise-shaping approaches requiring additional operational amplifiers and passive approaches being less effective.
Innovation Solution
Repurposing the preamplifier portion of the comparator circuit in SAR ADCs to function as an amplifier for residue amplification and noise-shaping, allowing for efficient reuse in a noise-shaping feedback configuration, reducing die area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If active noise-shaping approaches are used in SAR ADCs, then noise performance is improved, but additional operational amplifiers are required increasing device complexity and power consumption
Solution Approach 1:
The comparator circuit is designed to perform multiple functions: it operates as a comparator during the conversion phase and is reconfigured as a residue amplifier during the noise-shaping phase. This multi-functionality eliminates the need for separate operational amplifiers, reducing device complexity while maintaining improved noise performance through active noise-shaping
Solution Approach 2:
The comparator circuit is dynamically reconfigured between two operational modes: comparison mode during conversion and amplification mode during noise-shaping. The circuit topology and control signals change dynamically to switch between these functions, allowing one circuit to replace multiple static circuits
2Measurement precision
If additional operational amplifiers are added for noise-shaping, then noise performance is improved, but power consumption increases
Solution Approach 1:
The comparator circuit serves dual purposes by functioning as both a comparator and a residue amplifier at different times. This eliminates the need for additional operational amplifiers, thereby reducing power consumption while still achieving improved noise performance through the noise-shaping function
Solution Approach 2:
After the comparator completes its comparison function, it is reconfigured to perform residue amplification for noise-shaping. This recovery and reuse of the comparator circuit for an additional function eliminates the need for separate amplifiers, reducing overall power consumption in the ADC system
3Adaptability or versatility
If separate amplifiers are used for residue amplification, then signal processing capability is improved, but die area increases
Solution Approach 1:
The comparator circuit is designed with universal functionality to perform both comparison and residue amplification. By reconfiguring the same circuit for different purposes at different times, the need for separate amplifier circuits is eliminated, reducing die area while maintaining enhanced signal processing capability through noise-shaping
4Device complexity
If passive noise-shaping approaches are used, then device complexity is reduced, but noise performance is less effective
Solution Approach 1:
The system achieves active noise-shaping performance without the continuous complexity of separate amplifiers by dynamically reconfiguring the comparator. The circuit switches between comparison and amplification modes, enabling effective noise-shaping with reduced device complexity compared to traditional active approaches
Data Source
AI summary
Some or all of a comparator circuit of an analog-to-digital converter (ADC) circuit can be efficiently repurposed or reused for residue amplification for efficient noise-shaping, e.g., in a noise-shaping feedback configuration. A preamplifier portion of a comparator circuit in an oversampling ADC can be re-purposed to provide an amplifier to amplify or otherwise modify a residue left after the bit trials of a conversion cycle. The amplified or modified residue can then be used elsewhere, for example, for noise-shaping by applying a noise transfer function (NTF), a result of which can then be fed back (e.g., summed with the next sampled input at an input of the comparator circuit for use in the N bit trials of the next ADC cycle).