SAR ADC Comparison Skipping for Faster Accurate Conversion
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Solution Overview
Problem
Conventional analog-to-digital conversion devices experience increased comparison time and errors due to repeated bit-by-bit comparisons, especially when the difference between comparison voltage and analog signal is small.
Innovation Solution
The proposed solution involves generating multiple comparison voltages, skipping the comparison result with the smallest difference, and using a calculation unit to generate an end of comparison based on remaining results, thereby reducing comparison time and errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If repeated bit-by-bit comparison operations are performed in conventional analog-to-digital conversion devices, then comparison completeness is improved, but comparison time increases
Solution Approach 1:
The patent applies the skipping principle by identifying and eliminating redundant comparison operations. Specifically, when a comparison result indicates that the remaining unconverted bits cannot affect the final digital output (determined by the difference between analog input voltage and current comparison voltage), the system skips those unnecessary comparisons and directly proceeds to generate the final digital signal, thereby reducing overall comparison time while maintaining accuracy
Solution Approach 2:
The patent implements partial action by performing only the necessary number of comparison operations required to achieve accurate conversion. Instead of always completing all bit-by-bit comparisons, the system dynamically determines when sufficient comparisons have been made based on voltage difference thresholds, avoiding excessive operations that would waste time
2Measurement precision
If repeated comparison operations are performed, then conversion accuracy is improved, but error occurrence increases when difference between comparison voltage and analog signal is small
Solution Approach 1:
The patent introduces an intermediary determination mechanism that assesses whether continued comparison operations are worthwhile. Before performing each comparison, the system evaluates the voltage difference between the analog input and current comparison voltage. If this difference is smaller than a predetermined threshold, the intermediary logic determines that further comparisons would be redundant and may introduce errors, thus blocking unnecessary operations
Solution Approach 2:
The patent replaces the mechanical blind repetition of comparison operations with an intelligent decision-making system. Instead of mechanically continuing all bit-by-bit comparisons regardless of conditions, the system uses voltage difference evaluation and logical determination to substitute mechanical repetition with smart control, preventing error-prone operations when voltage differences are minimal
3Measurement precision
If all comparison results are processed in conventional devices, then digital signal accuracy is improved, but processing complexity increases
Solution Approach 1:
The patent extracts and removes unnecessary comparison results from the processing pipeline. By evaluating voltage differences and determining which comparisons are redundant, the system extracts only the essential comparison data needed for accurate conversion, discarding extraneous results that would complicate processing without adding value to the final digital signal accuracy
Data Source
AI summary
The analog-to-digital conversion device includes a signal generating unit that generates a plurality of comparison voltages based on an analog input voltage and generates a plurality of comparison results of the plurality of comparison voltages based on a sampling period, a calculation unit that skips a comparison result generated by a comparison voltage having a smallest difference between the analog input voltages among the plurality of comparison voltages from the plurality of comparison results and generates an end of comparison based on a remaining plurality of comparison results, and a SAR logic unit that generates a digital signal corresponding to the end of comparison and stores information for each bit of the digital signal.