SAR ADC Correction Circuit for Dielectric Absorption Crosstalk

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Solution Overview

Problem

Dielectric absorption in capacitors used in successive approximation register analog to digital converters (SAR ADCs) leads to cross-talk and increased latency, affecting signal-to-noise and distortion ratio (SINAD) and introducing crosstalk tones due to the inherent properties of dielectric materials, which are exacerbated in smaller geometries.

Innovation Solution

A correction circuit that adjusts the present digital code value based on a previous digital code value, acquisition time, and temperature is implemented, along with shuffling capacitors between successive sampling and bit test stages in the PDAC and NDAC to reduce dielectric absorption effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a capacitor array is used in SAR ADC, then the ADC can perform analog-to-digital conversion, but dielectric absorption causes cross-talk and degraded SINAD

Engineering Contradiction:
ImproveSINADVSAvoiddielectric absorption
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by performing a reset phase before the actual sampling and conversion. During this reset phase, the capacitor array is discharged to a known state, which eliminates residual charges from previous conversions that would otherwise cause dielectric absorption effects. This preliminary reset action prevents cross-talk between consecutive conversions and maintains accurate SINAD measurements.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the harmful dielectric absorption effect into a benefit by using it to determine when the capacitor array has fully discharged. The dielectric absorption recovery voltage is measured and used as a reference to verify that the reset phase has sufficiently discharged the capacitors. This turned-around approach uses the harmful effect as a diagnostic tool to ensure proper reset completion, thereby eliminating cross-talk issues.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Measurement precision

If capacitor discharge time is extended to reduce dielectric absorption effects, then SINAD improves, but conversion latency increases

Engineering Contradiction:
ImproveSINADVSAvoidconversion latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies skipping by implementing a time-limited reset phase with a predetermined maximum duration. Instead of allowing the capacitor discharge to proceed indefinitely until complete, the system rushes through the reset phase within a fixed time window that is sufficient to discharge most of the charge. This approach skips the lengthy tail end of the discharge curve where diminishing returns occur, thereby reducing conversion latency while maintaining adequate SINAD performance.

Inventive Principle:
Principle #21Skipping (Rushing through)

Solution Approach 2:

The patent applies parameter changes by dynamically adjusting the reset phase duration based on operating conditions such as temperature and previous conversion characteristics. The system monitors dielectric absorption recovery voltage and uses this information to optimize the reset time parameter. By changing the reset duration parameter adaptively, the system achieves optimal balance between SINAD improvement and latency reduction for different operating scenarios.

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If dielectric material with low absorption is used, then dielectric absorption effects are reduced, but other material properties may compromise ADC performance

Engineering Contradiction:
Improvedielectric absorptionVSAvoidADC performance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent applies parameter changes by adjusting the operating voltage levels and timing parameters to compensate for the specific characteristics of the chosen dielectric material. Rather than simply selecting a material with low absorption, the system tailors the voltage swing amplitude, reset duration, and sampling timing to match the dielectric's relaxation time constants. This parameter optimization ensures reliable ADC performance while utilizing the benefits of the selected dielectric material.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies dynamics by implementing adaptive control of the capacitor array operation based on real-time monitoring of dielectric absorption effects. The system dynamically adjusts switching timing, voltage levels, and reset duration in response to measured recovery voltages. This dynamic adaptation allows the ADC to maintain high reliability across varying operating conditions while minimizing dielectric absorption impacts, regardless of the specific dielectric material properties.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces dielectric absorption impacts, improving SINAD and minimizing crosstalk, thereby enhancing the accuracy and efficiency of the SAR ADC by accounting for the effects of dielectric relaxation times and temperatures.

Implementation Method 1

Dielectric absorption is an intrinsic property of a capacitor to partially recharge itself shortly after it has been discharged. The dielectric absorption phenomenon is a result of dipole or electrical relaxations in the dielectric material disposed between opposed capacitor pates.

Methodology Applied
Scientific EffectDielectric absorption: Dielectric

Data Source

PatentUS10256831B2Method and apparatus to reduce effect of dielectric absorption in SAR ADC
Publication Date: 2019.04.09 ANALOG DEVICES INT UNLTD CO
  • US10256831B2 patent drawing
  • US10256831B2 patent drawing
  • US10256831B2 patent drawing

AI summary

A successive approximation register analog to digital converter (SAR ADC) is provided in which impact of dielectric absorption is reduced with a correction circuit configured to adjust a present digital code value signal based at least in part upon a previous digital code value signal, an acquisition time and temperature.