SAR ADC Nonlinearity Correction with Auxiliary DAC Injection
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Solution Overview
Problem
Analog to digital converters (ADCs) generate digital codes that deviate from expected values due to non-linearity errors, offset, and gain errors, leading to inaccuracies in signal representation.
Innovation Solution
A method is introduced where an error signal representing the deviation from expected digital codes is computed and added to the stored analog signal sample, using a successive approximation ADC, to generate corrected digital values. This involves storing the sample, forming the error signal based on partial digital codes and error coefficients, and adding it to the sample using an auxiliary DAC to achieve accurate digital conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADC design is used, then device complexity is reduced, but measurement precision deteriorates due to non-linearity errors and deviations from expected digital codes
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing error correction values in lookup tables before the actual conversion process. The error coefficients are determined during calibration and stored in memory, allowing the ADC to compensate for non-linearity errors without adding complex real-time computation circuits. This approach improves measurement precision while maintaining relatively simple device structure.
Solution Approach 2:
The patent introduces an intermediary correction mechanism that acts between the raw ADC output and the final digital code. An auxiliary DAC generates correction signals based on error coefficients, and these correction signals are added to the original signal through a summing junction. This intermediary correction process eliminates deviations from expected values without fundamentally changing the core ADC architecture.
2Measurement precision
If error correction is applied to each sample, then measurement precision is improved, but productivity decreases due to additional processing time
Solution Approach 1:
The patent performs error correction calculations in advance during calibration phases and stores the results in lookup tables. During actual conversion operations, the system only needs to perform simple table lookups and additions rather than complex real-time error calculations. This preliminary preparation significantly reduces the processing time required for each conversion while maintaining high measurement precision.
Solution Approach 2:
The patent applies partial correction by focusing on the most significant error sources (integral non-linearity and differential non-linearity) rather than attempting to correct all possible error types. The correction is applied to the essential components of the transfer function, achieving sufficient precision for most applications without the excessive processing overhead of comprehensive error correction.
3Manufacturing precision
If simple ADC architecture is used, then ease of manufacture is improved, but manufacturing precision deteriorates due to component non-linearity
Solution Approach 1:
The patent implements self-service by enabling the ADC to automatically compensate for its own manufacturing imperfections. During calibration, the system measures its actual transfer function and calculates correction coefficients that account for component non-linearity and other manufacturing variations. The ADC then uses these coefficients to self-correct its output, achieving high manufacturing precision without requiring manually adjusted precision components.
Solution Approach 2:
The patent changes the operational parameters of the ADC by introducing correction coefficients that modify the transfer function. Instead of relying on precise physical component values, the system uses software-based parameter adjustments to compensate for manufacturing variations. This allows standard, easily manufactured components to achieve precision equivalent to expensive precision components.
Data Source
AI summary
Errors in an analog to digital converter that cause generated digital codes to deviate from expected values are corrected. A sample of an analog signal is stored in a storage element. An error signal is then generated, with the error signal representing a deviation of an expected digital code for the strength of a sample of an analog input from a value that would be generated without correction. The error signal is then added to the stored sample. In an embodiment implemented in the context of a SAR ADC, a digital value representing an integral non-linearity error is generated based on a partial digital code (result of a partial conversion of the sample) and an error coefficient. The digital value is converted to analog form by an auxiliary DAC, and added to the stored input sample.