SAR ADC DAC Presetting for Extended Input Range
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Solution Overview
Problem
Conventional top-plate sampling charge redistribution, successive approximation register (CR-SAR) analog to digital converters (ADCs) suffer from an attenuated input range due to parasitic capacitance, which negatively impacts the Signal to Noise-and-Distortion Ratio (SNDR) and effective number of bits (ENOB).
Innovation Solution
The proposed solution involves an analog to digital converter (ADC) system that extends the input range by pre-setting the digital to analog converter (DAC) using available DAC weights during the sampling phase. This is achieved by modifying the digital control values of the DAC to add a digital offset, allowing the ADC to sample input voltages outside the conventional full-scale range without attenuation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional top-plate sampling CR-SAR ADC is used, then the conversion process is simple, but the input range is attenuated due to parasitic capacitance
Solution Approach 1:
The patent applies preliminary action by presetting the DAC with an initial digital value before the sampling phase. This preset value is calculated based on the previous conversion result and signal characteristics, preparing the system in advance to handle extended input ranges. The presetting occurs in the initialization stage, before the actual sampling and conversion process begins.
Solution Approach 2:
The patent implements dynamics by making the DAC preset value dynamic and adaptive rather than fixed. The preset value changes based on the previous conversion result and detected signal characteristics, allowing the system to adapt to varying input conditions. This dynamic adjustment enables the ADC to maintain optimal performance across an extended input range.
2Device complexity
If conventional sampling method is used, then the circuit structure is simple, but parasitic capacitance negatively impacts SNDR and ENOB
Solution Approach 1:
The patent applies parameter changes by modifying the digital control values of the DAC to include a preset offset. This parameter modification effectively changes the operating point of the ADC system, allowing it to compensate for the negative effects of parasitic capacitance. The preset value adjusts the voltage levels during conversion, maintaining signal integrity and improving SNDR and ENOB measurements.
3Adaptability or versatility
If DAC is preset with digital offset, then input range is extended, but additional control logic is required
Solution Approach 1:
The patent applies universality by designing the control logic to serve multiple functions. The same control unit that manages the normal conversion process also calculates and applies the preset value. The digital offset application is integrated into the existing conversion architecture, allowing the control logic to handle both standard and extended range conversions without requiring completely separate control paths.
Data Source
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AI summary
An analog to digital converter including a digital to analog converter (DAC), a comparator, and a controller. The DAC includes a sample node and a capacitor array controlled by a digital control input. The comparator compares a voltage of the sample node with a reference voltage to generate a comparison value. The controller presets the digital control input, prompts the DAC to sample the input voltage onto the sample node, resets the digital control input, and performs a conversion by successively adjusting the digital control input based on the comparison value to determine a digital output. A preset value is subtracted from the digital output to provide an adjusted digital output. A sample predictor predicts the next sample to determine the preset value used to adjust the sample node within a full scale range after DAC reset.