SAR ADC Built-In Self-Test for Fast Defect Detection
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Solution Overview
Problem
Conventional methods for detecting defects in successive-approximation-register analog-to-digital converters (SAR ADCs) are time-consuming and costly, and existing test methods do not effectively identify manufacturing defects such as inaccurate capacitance, switch malfunctions, or comparator failures.
Innovation Solution
A built-in self-test function for SAR ADCs using a redundant coding scheme, where a defect-sensitive voltage is input and converted multiple times with varying bit settings to generate digital codes, allowing defects to be detected based on output digital codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional test methods are used to detect defects in SAR ADC, then defect detection capability is provided, but test time becomes long and system overhead increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing expected output digital codes for multiple defect scenarios (capacitor defects, switch defects, comparator defects, and normal operation) in a lookup table before actual testing. During defect detection, the system only needs to compare the actual output with the pre-stored expected codes, eliminating the need for complex real-time analysis and significantly reducing test time while maintaining comprehensive defect detection capability
2Reliability
If multiple test voltages are input to detect defects in SAR ADC, then defect detection coverage is improved, but test complexity and system overhead increase
Solution Approach 1:
The patent applies universality by designing a single test circuit that can detect all types of defects (capacitor, switch, comparator, and manufacturing defects) through a unified approach. The circuit uses one defect-sensitive voltage input and a universal lookup table that contains expected codes for all defect scenarios, eliminating the need for multiple dedicated test circuits or complex test voltage sequences, thus reducing system overhead while maintaining comprehensive defect detection coverage
Solution Approach 2:
The patent applies copying by creating a lookup table that stores pre-calculated expected output codes for all possible defect conditions. Instead of performing complex real-time calculations to determine if defects exist, the system simply copies and compares the actual output against the pre-stored expected codes in the lookup table. This copying approach simplifies the test logic and reduces the computational complexity of the test system while maintaining comprehensive defect detection capability
Data Source
AI summary
An analog-to-digital converter and a method and circuit for detecting a defect in the convertor are provided. The converter has a built-in self-test function and includes: an SAR ADC based on a redundant coding scheme; an inputting unit configured for inputting a defect-sensitive voltage into the SAR ADC; a controlling unit configured for controlling the SAR ADC to perform an analog-to-digital conversion on the defect-sensitive voltage, wherein the controlling includes the following steps: (a) setting a kth bit in one of the plurality of K-bit binary numbers to a fixed value; (b) controlling the SAR ADC to generate an output digital code Dout(k); and (c) changing a value of k and cycling through step (a) to step (b) to generate K output digital codes Dout(k); and a determining unit configured for determining whether the SAR ADC has a defect based on the K output digital codes Dout(k).