SAR ADC Adaptive Voltage Scaling for Delay-Based Power Reduction
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Solution Overview
Problem
High-speed Analog to Digital Converters (ADCs) consume unnecessary power when operating under better-than-worst-case conditions due to traditional design approaches that fail to dynamically adjust power consumption based on current process corners and temperatures.
Innovation Solution
An Integrated Circuit (IC) with an Adaptive Voltage Scaling (AVS) circuit that includes a test circuit and a power supply, where the AVS circuit determines the conversion delay of a test ADC and adjusts the supply voltage to minimize power consumption while meeting performance requirements, using a Time-to-Digital Conversion circuit and logic to generate voltage correction instructions based on delay measurements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the ADC is designed to meet timing requirements at worst-case conditions, then reliability is improved, but power consumption increases unnecessarily under better conditions
Solution Approach 1:
The patent implements dynamic voltage scaling by adjusting the supply voltage to the ADC based on measured process corner characteristics. The system transitions from a static worst-case design to a dynamic adaptation mechanism that modifies operating voltage according to actual conditions, thereby reducing power consumption when full voltage is not required while maintaining timing compliance.
Solution Approach 2:
The system changes the operating voltage parameter based on measured delay characteristics of the ADC. By determining the actual process corner through delay measurements and adjusting the supply voltage accordingly, the system optimizes the voltage parameter to minimize power consumption while ensuring timing requirements are met for the specific process corner.
2Use of energy by moving object
If the supply voltage is reduced to minimize power consumption, then energy efficiency is improved, but conversion speed may deteriorate
Solution Approach 1:
The patent implements a feedback mechanism where the system measures the delay of the ADC, determines the process corner based on measured delay characteristics, and adjusts the supply voltage accordingly. This closed-loop feedback ensures that voltage is reduced only to the extent that timing requirements remain satisfied, preventing speed deterioration while minimizing power consumption.
Solution Approach 2:
The system performs preliminary delay measurements and process corner determination before finalizing the operating voltage. By characterizing the ADC's delay characteristics in advance and using this information to set the appropriate voltage level, the system ensures that speed requirements are met before power optimization is applied.
Data Source
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AI summary
An Integrated Circuit (IC) includes one or more functional circuits of a given type, a test circuit including a selected one of the functional circuits or a replica circuit of the same type as the functional circuits, and an Adaptive Voltage Scaling (AVS) circuit. The AVS circuit is configured to determine a delay of the test circuit, and to adjust a supply voltage of the functional circuits in response to the determined delay of the test circuit.