SAR ADC Capacitor Self-Calibration for DNL Measurement
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Solution Overview
Problem
Existing successive approximation register (SAR) analog-to-digital converters (ADCs) face challenges in efficiently calibrating capacitors for high-resolution analog-to-digital conversion due to complex and time-consuming production processes, particularly in achieving precise matching of capacitance values for higher bit resolutions.
Innovation Solution
The method involves switching an electronic device into a calibration mode to sample a reference voltage on less significant capacitors, performing an analog-to-digital conversion cycle, and using the conversion result to trim the more significant capacitors, allowing for quicker calibration with minimal additional hardware and interference with standard design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional trimming or calibration procedures are used to adjust capacitor mismatch, then manufacturing precision is improved, but device complexity and production time increase
Solution Approach 1:
The patent implements self-calibration by having the ADC system automatically measure its own capacitor mismatch and apply corrections without external intervention. The calibration circuit uses the ADC's existing components (capacitors, comparator, control logic) to perform automated differential non-linearity measurement and correction, eliminating the need for complex external trimming equipment and manual calibration procedures.
Solution Approach 2:
The patent changes the operational parameters of the ADC by introducing a calibration mode that modifies the normal conversion process. During calibration, the system applies test voltages to specific capacitors, measures the resulting differential non-linearity, and adjusts capacitor values or correction factors based on measured deviations from ideal behavior, thereby improving matching precision through controlled parameter variations.
2Manufacturing precision
If laser trimming or switch-based capacitor adjustment is used, then manufacturing precision is improved, but production time and costs increase
Solution Approach 1:
The patent replaces physical mechanical trimming methods (laser trimming, switch-based adjustment) with an electrical/software-based calibration approach. Instead of physically modifying capacitor connections or values during production, the system uses digital correction codes and control signals to compensate for capacitor mismatch, dramatically reducing production time and eliminating complex mechanical calibration equipment.
Solution Approach 2:
The patent performs calibration measurements and corrections as a preliminary step before final product assembly or testing. By measuring differential non-linearity and applying corrections during the manufacturing process rather than as a separate post-processing step, the system improves productivity by integrating calibration into the production flow rather than adding it as an additional time-consuming stage.
3Measurement precision
If capacitor values are trimmed to achieve high resolution, then measurement precision is improved, but device complexity and production interference increase
Solution Approach 1:
The patent makes existing ADC components serve multiple functions: the capacitor array is used both for normal analog-to-digital conversion and for calibration measurements; the comparator and control logic are reused for both conversion and differential non-linearity measurement; the digital output mechanism serves both conversion results and calibration data. This multi-functionality eliminates the need for separate calibration hardware and reduces overall device complexity.
Solution Approach 2:
The patent introduces a calibration control mechanism that acts as an intermediary between the physical capacitors and the digital correction system. This intermediary layer manages the calibration process by selecting which capacitors to measure, interpreting measurement results, and applying appropriate correction codes, thereby simplifying the overall system architecture while maintaining high measurement precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster and less intrusive calibration of capacitors, reducing production costs and time while maintaining high resolution and linearity, with the ability to achieve calibration precision below 1 least significant bit (LSB).
Implementation Method 1
a capacitive digital-to-analog converter (CDAC) comprising a plurality of capacitors
Data Source
AI summary
The device comprises a successive approximation register, a capacitive digital-to-analog converter comprising a plurality of capacitors, the plurality of capacitors being coupled with a first side to a common node; a comparator coupled to the common node and being adapted to make bit decisions by comparing a voltage at the common node with another voltage level, and a SAR control stage for providing a digital code representing a conversion result. The device is configured to operate in a calibration mode, where the device is configured to sample a reference voltage on a first capacitor of the plurality of capacitors by coupling one side of the first capacitor to the reference voltage, to perform a regular conversion cycle with at least those capacitors of the plurality of capacitors having lower significance than the first capacitor and to provide the conversion result of the regular conversion cycle for calibrating the first capacitor.