SAR ADC Dual Calibration for Capacitor Mismatch Linearity
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Solution Overview
Problem
Systematic and random mismatch in capacitors of SAR ADCs leads to integral non-linearity and differential non-linearity, resulting in missing codes that negatively impact the signal-to-noise ratio and cause image artifacts in imaging systems.
Innovation Solution
A digital calibration circuit system comprising a first calibration circuit to correct systemic mismatch and a second calibration circuit to correct random mismatch, which identifies missing codes, computes weights for non-linearity errors, and applies a dither algorithm to randomize ADC codes, thereby generating a corrected digital output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If capacitor values are made precise to reduce mismatch, then non-linearity (INL and DNL) is reduced, but manufacturing precision requirements increase significantly
Solution Approach 1:
The patent performs calibration measurements before the ADC is deployed for normal operation. The calibration circuit measures the actual capacitance values of all capacitors in advance, stores these values in a lookup table, and uses them to generate correction codes. This preliminary characterization allows the system to compensate for manufacturing variations without requiring extremely tight capacitor matching during normal operation.
Solution Approach 2:
The patent implements a feedback mechanism where the calibration circuit measures the actual capacitor values and uses this information to generate correction codes that compensate for the measured deviations. The lookup table stores pre-computed correction values based on measured capacitor ratios, and these corrections are applied during normal ADC operation to eliminate the effect of capacitor mismatch on linearity.
2Measurement precision
If calibration circuits are added to correct mismatch, then ADC linearity and SNR are improved, but device complexity increases
Solution Approach 1:
The patent extracts the calibration function into a separate, dedicated calibration circuit that operates independently from the main ADC conversion path. The calibration circuit includes its own capacitor array, measurement logic, and lookup table, allowing it to characterize the capacitors without interfering with normal ADC operation. This separation enables calibration to be performed as a distinct preliminary step.
Solution Approach 2:
The patent creates a simplified model of the capacitor array within the calibration circuit that mirrors the structure of the main ADC capacitor array. By measuring the ratios in this copied structure and storing the results in a lookup table, the system can quickly retrieve pre-computed correction codes during normal operation without performing complex real-time calculations, thus reducing the complexity of the main ADC path.
3Measurement precision
If lookup tables with correction codes are implemented, then missing codes are resolved and non-linearity is reduced, but memory requirements and device area increase
Solution Approach 1:
The patent generates correction codes specifically tailored to the actual measured capacitor ratios of each device. Instead of using a generic correction scheme, the lookup table is populated with correction values that are locally optimized for the specific capacitor array being calibrated. This device-specific approach maximizes the effectiveness of the correction while allowing for more efficient memory usage, as the table only needs to store corrections for the actual device characteristics.
Solution Approach 2:
The patent changes the parameters stored in the lookup table from raw capacitor values to pre-computed correction codes that directly compensate for the measured deviations. By transforming the calibration data into a format that can be directly applied as correction codes, the system reduces the computational burden during normal operation and minimizes the memory requirements, as only the essential correction information needs to be stored rather than complete capacitor characterization data.
Data Source
AI summary
Various embodiments of the present technology may provide methods and apparatus for a successive approximation register analog-to-digital converter (SAR ADC). The SAR ADC may provide a first digital calibration circuit configured to correct systemic mismatch and a second digital calibration circuit configured to correct random mismatch. Together, the first and second digital calibration circuits resolve missing codes in the SAR ADC output.