SAR ADC Reference Voltage Scheme for Dynamic Range Extension
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Solution Overview
Problem
Conventional SAR ADC architectures use reference voltages equal to the maximum input voltage, which significantly affects the power consumption of the capacitive digital to analog converter (CDAC), limiting the dynamic range and efficiency of the conversion process.
Innovation Solution
A SAR ADC design that utilizes a reference voltage approximately half the difference between the maximum and minimum input voltages, allowing for a more efficient power management and extended dynamic range by adjusting the digital output word generation based on comparisons with the reference voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the reference voltage is set equal to the maximum input voltage, then the dynamic range coverage is improved, but the power consumption of the CDAC increases significantly
Solution Approach 1:
The patent changes the reference voltage parameter from the conventional value (equal to maximum input voltage) to a new value (approximately half the difference between maximum and minimum input voltages). This parameter change directly reduces the power consumption of the CDAC while maintaining adequate dynamic range coverage through adjusted conversion logic.
Solution Approach 2:
The patent segments the dynamic range handling by introducing offset voltage compensation. The conversion process is divided into handling the voltage offset separately from the main conversion, allowing the reference voltage to be reduced without losing the ability to accurately represent the full input range.
2Use of energy by moving object
If the reference voltage is reduced to half the difference between maximum and minimum input voltages, then the power consumption is reduced, but the dynamic range coverage may be compromised
Solution Approach 1:
The patent implements feedback through offset voltage compensation mechanisms. The system monitors the conversion results and adjusts for the reduced reference voltage range, ensuring that the full dynamic range is accurately represented despite the lower reference voltage. This feedback loop maintains measurement precision while benefiting from reduced power consumption.
Solution Approach 2:
The patent introduces an offset voltage as an intermediary element. This offset compensates for the reduced reference voltage range, acting as a mediator that allows the system to use a lower reference voltage (reducing power consumption) while still maintaining full dynamic range coverage through the compensating offset.
Data Source
AI summary
An ADC, including a DAC which receives an analog input voltage and a digital input word from SAR logic, and generates a first voltage based on the analog input voltage and the digital word. The ADC also includes a comparator, which receives the first voltage and a reference voltage, and generates a second voltage based on the first voltage and on the reference voltage. The second voltage has a value corresponding with a sign of the difference between the first voltage and the reference voltage. The ADC also includes the SAR logic circuit which receives the second voltage from the comparator. The SAR logic generates a digital output word based on a second voltages received from the comparator. A difference between the minimum input voltage on the maximum input voltage is substantially equal to two times a difference between reference voltage and the minimum input voltage.