SAR ADC Dynamic Reference Voltage for Lower Power Conversion

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Solution Overview

Problem

Conventional SAR ADCs face inefficiencies due to fixed reference voltages that affect power consumption and conversion time, especially when dealing with varying input voltages, leading to suboptimal performance in power and latency.

Innovation Solution

The proposed SAR ADC uses a dynamic reference voltage set to half the difference between the maximum and minimum input voltages, allowing capacitors to adjust voltage levels based on comparator outputs, thereby optimizing digital output generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a reference voltage equal to the maximum input voltage is used in conventional SAR ADC, then the conversion accuracy is maintained, but the power consumption of the CDAC increases significantly

Engineering Contradiction:

Improveconversion accuracyVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the reference voltage parameter from a fixed maximum value to a dynamic value that adapts to the actual input signal range. The reference voltage is set to half the difference between maximum and minimum input voltages, which reduces the voltage swing across capacitors in the CDAC, thereby reducing power consumption while maintaining conversion accuracy through dynamic adjustment.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic adjustment of the reference voltage based on the actual input signal characteristics. The reference voltage is no longer static but is dynamically set according to the difference between maximum and minimum input voltages, allowing the system to adapt to varying signal conditions and optimize power consumption accordingly.

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If a higher reference voltage is used in the CDAC, then the dynamic range is expanded, but the power consumption increases

Engineering Contradiction:

Improvedynamic rangeVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent dynamically adjusts the reference voltage parameter based on the actual input signal range rather than using a fixed high value. By setting the reference voltage to half the difference between maximum and minimum input voltages, the system achieves adequate dynamic range for the actual signal while reducing power consumption compared to using a consistently high reference voltage.

Inventive Principle:

Principle #35Parameter changes

3Use of energy by moving object

If the reference voltage is reduced to lower power consumption, then the power efficiency improves, but the ability to handle varying input voltages is compromised

Engineering Contradiction:

Improvepower consumptionVSAvoidinput voltage range handling

Core Design Contradiction:

Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements a feedback mechanism where the reference voltage is adjusted based on the actual input signal range detection. The system monitors the input voltage characteristics and dynamically sets the reference voltage to half the difference between maximum and minimum input voltages, ensuring adequate handling capability while optimizing power consumption.

Inventive Principle:

Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the SAR ADC's ability to accurately convert analog inputs with reduced power consumption and improved latency by dynamically adjusting voltage levels according to input conditions.

Implementation Method 1

the comparator compares the analog input voltage with the reference voltage and generates a comparison output indicating whether the analog input voltage is greater than or less than the reference voltage

Methodology Applied

Scientific EffectVoltage comparison:

Implementation Method 2

the capacitors adjust voltage levels based on comparator outputs, thereby optimizing digital output generation

Methodology Applied

Scientific EffectCapacitive switching: Capacitance

Data Source

PatentEP3613147B1Successive approximation register (SAR) analog to digital converter (ADC)

Publication Date: 2021.10.27 SHENZHEN GOODIX TECH CO LTD

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AI summary

An analog to digital converter (ADC) is disclosed. The ADC includes a DAC which generates a first signal based on an analog input and a digital input word, and a comparator which generates a comparator output having a value corresponding with a sign of a difference between first and second signals. During a first time period, the second signal is equal to a reference signal, the first signal is equal to an analog input, and the comparator generates a first comparator output. During a second time period, the second signal is equal to the reference signal, the first signal is equal to a the analog input plus a predetermined signal, and the comparator generates a second comparator output. A SAR logic circuit generates the digital input word for the DAC based on the first and second comparator outputs.