SAR ADC Feedback Filter for Higher SNDR and Faster Settling

Solution Overview

Problem

Successive approximation register (SAR) analog-to-digital converters (ADCs) face limitations in resolution and settling time due to the performance characteristics of their feedback delta-sigma digital-to-analog converters (DACs), particularly for high-resolution applications, where improving signal-to-noise and distortion ratio (SNDR) often worsens settling time and increases silicon area.

Innovation Solution

Incorporating a high-order passive low pass filter in the feedback loop of the delta-sigma DAC, such as a fourth-order filter, to optimize the signal-to-noise and distortion ratio (SNDR) and settling time simultaneously, while maintaining minimal silicon area, and using a coherent reference voltage with the battery voltage to stabilize the ADC output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a high-order passive low pass filter is added to the feedback loop, then SNDR is improved and resolution is increased, but device complexity and silicon area increase

Engineering Contradiction:

ImproveresolutionVSAvoiddevice complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

A passive low pass filter is introduced as an intermediary component in the feedback loop between the DAC and comparator. This filter mediates the signal path, providing noise filtering and waveform smoothing without requiring active components or complex circuitry, thus improving resolution while minimizing added complexity

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a simple passive RC low pass filter consisting of basic resistors and capacitors rather than complex active filters. These inexpensive, simple components achieve the necessary filtering function with minimal silicon area and low complexity, effectively treating the filtering function as a basic, disposable element

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

2Measurement precision

If the feedback DAC is optimized for higher SNDR, then resolution improves, but settling time increases

Engineering Contradiction:

ImproveSNDRVSAvoidsettling time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The passive low pass filter serves as a mediator that shapes the feedback signal waveform before it reaches the comparator. By filtering the DAC output, the filter reduces signal ringing and oscillations, enabling faster settling without compromising the SNDR performance achieved by the optimized feedback DAC

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent optimizes the time constant (RC product) of the passive low pass filter to achieve the desired balance between SNDR and settling time. By carefully selecting the filter parameters, the system achieves adequate noise filtering while ensuring the feedback signal settles quickly for high-speed conversion

Inventive Principle:

Principle #35Parameter changes

3Area of stationary object

If a passive low pass filter is used instead of an active filter, then silicon area is reduced and power consumption decreases, but filtering performance may be limited

Engineering Contradiction:

Improvesilicon areaVSAvoidfiltering performance

Core Design Contradiction:

Area of stationary objectVSMeasurement precision

Solution Approach 1:

The patent employs a simple passive RC low pass filter consisting of basic resistors and capacitors rather than complex active filters. These inexpensive, simple components achieve the necessary filtering function with minimal silicon area and low complexity, effectively treating the filtering function as a basic, disposable element

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent optimizes the time constant (RC product) of the passive low pass filter to achieve the desired balance between SNDR and settling time. By carefully selecting the filter parameters, the system achieves adequate noise filtering while ensuring the feedback signal settles quickly for high-speed conversion

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively increases the resolution of SAR ADCs by enhancing SNDR and reducing settling time without increasing silicon area, while ensuring the ADC output is insensitive to fluctuations in battery voltage, thus improving overall performance in high-resolution applications.

Implementation Method 1

a delta-sigma modulator (DSM) coupled to the SAR to receive an N-bit output and generate a one-bit decision, a digital-to-analog converter (DAC) coupled to the DSM including an inverter and passive low pass filter to convert the one-bit modulated digital signal to an analog feedback signal

Methodology Applied

Scientific EffectLow pass filtering: Filter (electronic)

Implementation Method 2

a digital-to-analog converter (DAC) coupled to the DSM including an inverter and passive low pass filter to convert the one-bit modulated digital signal to an analog feedback signal

Methodology Applied

Scientific EffectInversion:

Implementation Method 3

a comparator to compare an analog input voltage signal received at a first input with a feedback signal received at a second input

Methodology Applied

Scientific EffectVoltage comparison:

Data Source

PatentUS8988263B2Successive approximation register (SAR) analog-to-digital converter (ADC) having optimized filter

Publication Date: 2015.03.24 SKYWORKS SOLUTIONS INC

AI summary

A system such as a mechanically tuned radio can have a signal path to receive and process an incoming radio frequency (RF) signal and to provide the processed signal to a first analog-to-digital converter (ADC) to convert the processed signal to a digital signal and to digitally demodulate the digital signal to obtain an audio signal, where this first ADC is separate from an auxiliary ADC not part of the signal path.