SAR ADC Gain Correction Using Prior Digital Codes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Successive-approximation register analog-to-digital converters face performance degradation due to gain errors in differential amplifiers, leading to asymmetrical and non-ideal performance curves, which affect the accuracy of digital code generation and residue values.
Innovation Solution
A system that includes a digital-to-analog converter, a differential amplifier with variable gain correction based on previously determined digital codes, and a multi-bit successive-approximation register to iteratively refine gain errors using a gain-error estimation circuit, ensuring accurate digital output signals by adjusting gains in real-time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If gain correction is applied using previously determined digital codes, then measurement precision is improved, but device complexity increases due to additional correction circuitry and processing steps
Solution Approach 1:
The patent implements feedback by using previously determined digital codes to calculate and apply gain corrections to the differential amplifier. The system feeds back the digital code information through a gain-error estimation circuit that computes correction values based on the relationship between expected and actual digital outputs, then applies these corrections to improve subsequent conversion accuracy.
Solution Approach 2:
The system performs self-correction by using its own output digital codes to generate gain correction values. The gain-error estimation circuit utilizes the digital codes already produced by the SAR ADC to calculate correction factors, allowing the system to self-adjust and compensate for gain errors without requiring external calibration equipment or additional sensing mechanisms.
2Measurement precision
If real-time gain correction is performed, then measurement precision is improved, but processing time increases due to additional correction calculations
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing gain correction values during idle periods or between conversion cycles. The gain-error estimation circuit computes correction factors based on previously obtained digital codes and stores them for immediate application, so that when a new conversion is needed, the correction is already prepared and can be applied without adding significant processing delay to the critical conversion path.
3Manufacturing precision
If multiple capacitor arrays are used in the digital-to-analog converter, then manufacturing precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent applies local quality by using capacitor arrays with different precision levels in different regions of the converter. Critical capacitors that have the greatest impact on conversion accuracy are manufactured with higher precision and tighter tolerance control, while less critical capacitors use standard fabrication processes. This selective approach to capacitor quality optimization reduces overall device complexity and power consumption while maintaining the necessary precision for accurate conversion.
Data Source
AI summary
A system has a digital-to-analog converter; a reference signal coupled to the digital-to-analog converter; a differential amplifier for applying gain, and for generating output signals as a function of sampled input signals, the reference signal, digital codes, and the gain applied by the differential amplifier coupled to the digital-to-analog converter; and a multi-bit successive-approximation register for determining the digital codes in successive stages coupled to the differential amplifier; and the gain applied by the differential amplifier is corrected based on previously determined digital codes.