SAR ADC Reference-Ripple Compensation Using Dual Half-Peak Pulses
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Solution Overview
Problem
High-resolution time-interleaved successive-approximation register (SAR) analog-to-digital converters (ADCs) face challenges in achieving high signal-to-noise distortion ratio (SNDR) and spurious-free dynamic range (SFDR) while maintaining speed, power efficiency, and chip area, due to reference buffer ripple degradation and the limitations of existing reference calibration and compensation architectures.
Innovation Solution
The implementation of a reference charge compensation (RCC) circuit with multiple pulses compensation, which splits a large peak charge of a ripple into dual half-peak charges for compensation, allowing for enhanced tolerance of process, voltage, and temperature (PVT) changes and reducing compensation overshoot.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If reference calibration and compensation architectures are used to reduce reference ripple, then SNDR and SFDR are improved, but device complexity and conversion cycle time increase
Solution Approach 1:
The patent segments the reference ripple compensation into multiple discrete charge pulses instead of using complex continuous calibration circuits. Each pulse corresponds to a specific bit weight, dividing the compensation task into manageable segments that can be applied sequentially during the SAR conversion process, thereby reducing overall circuit complexity while maintaining compensation effectiveness.
Solution Approach 2:
The patent applies preliminary action by pre-calculating and storing the required compensation charge values in lookup tables before the actual conversion process. This allows the compensation to be applied directly during conversion without real-time complex calculations, reducing the computational burden and circuit complexity while maintaining high measurement precision.
2Measurement precision
If error-correction schemes are used to achieve higher resolution, then measurement precision is improved, but conversion speed decreases due to extra conversion cycles
Solution Approach 1:
The patent performs preliminary action by pre-computing error correction values and storing them in lookup tables before conversion. During the actual conversion process, these pre-computed values are simply retrieved and applied, eliminating the need for additional conversion cycles while maintaining high resolution accuracy.
Solution Approach 2:
The patent integrates the error correction process into the main conversion flow, making it a continuous operation rather than a separate post-processing step. The correction values are applied during the same conversion cycle in which they are generated, ensuring continuous useful action without interrupting the conversion process.
3Device complexity
If single pulse compensation is used, then device complexity is reduced, but tolerance to PVT changes decreases and compensation overshoot increases
Solution Approach 1:
The patent segments the single large compensation pulse into multiple smaller pulses corresponding to different bit weights. This segmentation allows each pulse to be more precisely controlled and adjusted, improving tolerance to PVT variations while maintaining relatively simple circuit implementation. The distributed pulse approach reduces the risk of compensation overshoot compared to a single large pulse.
Data Source
AI summary
An analog-to-digital converter (ADC) circuit includes a digital-to-analog converter (DAC) circuit, a comparator circuit, an encoder, and a compensation circuit. The DAC circuit receives a reference voltage and provides an output signal based on the reference voltage. The comparator circuit compares the output signal with an analog input signal and generates a comparison signal. A reset command is generated based on the output signal being greater than the analog input signal. The encoder splits a ripple associated with the reference voltage into multiple pulses in response to a reset command. The compensation circuit generates, responsive to the reset command, compensation pulses to compensate the multiple pulses.