Split-CDAC SAR ADC Kickback Linearization for High-Impedance Inputs

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Solution Overview

Problem

Successive approximation register (SAR) analog-to-digital converters (ADCs) face poor sampling linearity when driven by high impedance sources due to kick-back issues, which existing solutions often address with power-consuming input drivers or time-consuming capacitor reset methods, leading to noise and increased conversion time.

Innovation Solution

The SAR ADCs employ a split capacitive digital-to-analog converter (CDAC) with a most significant bit (MSB) and least significant bit (LSB) capacitor arrays connected by a coupling capacitor, where the voltage on the MSB capacitor array is switched to the input terminal, and the coupling capacitor's voltage is used to cancel non-linear charge kick-back, improving linearity without affecting bandwidth or impedance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If input drivers are used to address kick-back issues, then sampling linearity is improved, but power consumption increases

Engineering Contradiction:

Improvesampling linearityVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts the problematic kick-back charge from the main sampling capacitor and redirects it through a separate path to the input terminal. By taking out the non-linear charge component and handling it separately, the system improves sampling linearity without requiring power-consuming input drivers to compensate for the kick-back effect.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary mechanism where the kick-back charge is routed through a controlled path involving switches and the input terminal. This intermediary approach allows the kick-back charge to be managed in a way that improves linearity while avoiding the need for additional power-consuming driver circuits.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Measurement precision

If capacitor reset methods are used to address kick-back issues, then sampling linearity is improved, but conversion time increases

Engineering Contradiction:

Improvesampling linearityVSAvoidconversion time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary routing of the kick-back charge to the input terminal during the sampling phase itself, rather than requiring a separate reset phase. By anticipating and handling the kick-back charge in advance within the normal sampling operation, the system improves linearity without adding time-consuming reset steps.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent maintains continuous useful action by integrating the kick-back charge management into the normal sampling operation. The kick-back charge is continuously routed to the input terminal during sampling without interrupting or pausing the conversion process, thereby maintaining high conversion speed while improving linearity.

Inventive Principle:

Principle #20Continuity of useful action

3Device complexity

If kick-back charge is not managed, then circuit simplicity is maintained, but sampling linearity deteriorates

Engineering Contradiction:

Improvecircuit simplicityVSAvoidsampling linearity

Core Design Contradiction:

Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments the charge handling into two distinct paths: the main sampling capacitor for normal operation and a separate kick-back charge routing path. This segmentation allows the system to maintain simplicity in the main sampling circuit while adding a dedicated, simple mechanism to handle the kick-back charge, thereby improving linearity without significantly increasing overall circuit complexity.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances kick-back linearity by preserving charge on the MSB capacitor array and compensating for non-linear components during sampling, reducing the impact of bandwidth and impedance on SAR ADC performance, thus improving conversion efficiency and accuracy.

Implementation Method 1

The coupling capacitor connects the first capacitor array to the second capacitor array. The coupling capacitor includes a top plate connected to a top plate of each of the capacitors of the first capacitor array, and a bottom plate connected to a top plate of each of the capacitors of the second capacitor array.

Methodology Applied

Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10340939B1Successive approximation register analog-to-digital converter with kickback linearization

Publication Date: 2019.07.02 TEXAS INSTRUMENTS INC

AI summary

A successive approximation register analog-to-digital converter with improved kick-back linearization includes a signal input terminal, a capacitive digital-to-analog converter, a first switch, and a second switch. The signal input terminal is configured to receive a signal to be digitized. The capacitive digital-to-analog converter includes a first capacitor array, a second capacitor array, and a coupling capacitor. The first capacitor array includes a plurality of capacitors. The second capacitor array includes a plurality of capacitors. The coupling capacitor connects the first capacitor array to the second capacitor array. The first switch is configured to switchably connect a bottom plate of each of the capacitors of the first capacitor array to the signal input terminal. The second switch is configured to conduct a voltage on the bottom plate of the coupling capacitor to the signal input terminal.