SAR ADC Capacitor Switching to Reduce Mismatch Error
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Solution Overview
Problem
SAR ADCs face accuracy issues due to element mismatch caused by fabrication process variations, affecting the accuracy of digital code generation.
Innovation Solution
The solution involves converting intermediate bits into multiple analog values using different capacitor banks, selecting capacitors from various locations to reduce mismatch, and repeating the conversion process for LSB bits while keeping MSB bits constant, with representative capacitors changed in each conversion, to generate multiple digital codes that are then averaged or added to enhance accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single set of capacitor banks is used for DAC in SAR ADC, then the device complexity is reduced, but the measurement precision deteriorates due to element mismatch from fabrication variations
Solution Approach 1:
The capacitor array is divided into multiple segments or groups, where each group contains a subset of capacitors. By selecting different combinations of these segmented groups for different conversions, the system reduces the impact of mismatch in any single capacitor while maintaining a manageable overall structure.
Solution Approach 2:
The system performs multiple conversions using periodically varying capacitor configurations. By cycling through different capacitor bank arrangements and averaging the results, the periodic variation cancels out systematic mismatch errors while maintaining operational complexity at acceptable levels.
2Measurement precision
If multiple conversions with different capacitor arrangements are performed, then the measurement precision is improved, but the productivity decreases due to repeated conversion processes
Solution Approach 1:
Capacitor bank pre-arrangements are prepared in advance, with multiple valid configurations stored or pre-configured. This allows the system to quickly switch between pre-planned arrangements without requiring complex real-time calculation or reconfiguration, thus maintaining high conversion speed while achieving improved precision through multiple measurements.
3Measurement precision
If capacitors are selected from the same location in the array, then the device complexity is minimized, but the manufacturing precision worsens due to localized fabrication variations
Solution Approach 1:
Different regions or locations of the capacitor array are utilized for different conversions. By distributing the selection across various local areas of the array rather than concentrating on a single location, the system averages out localized fabrication variations and achieves better overall matching accuracy.
Data Source
AI summary
An intermediate set of bits of a SAR ADC are converted into first intermediate analog value and a second intermediate analog value respectively from a first set of representative capacitor and a second set of representative capacitor. A capacitor in the first set and second set are selected as not same. A SAR ADC output code is generated from the first intermediate analog value and the second intermediate analog value. The resolution of a N bit SAR ADC can be enhanced by generating more than one N bits digital codes correspondingly operating the N Bit SARADC with more than on transfer functions. Each transfer function is selected such that they are offset by a fraction of LSB value. The more than one N bits digital codes are then added to form P bits digital code such that P is greater than N due to addition.