SAR ADC Error Correction Using a Reference-Guided ML Backend

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Solution Overview

Problem

Existing analog-to-digital converters (ADCs) face challenges in advanced technology nodes due to static and dynamic errors, mismatches, and increased power consumption, limiting their accuracy and speed, especially in high-bandwidth applications, and current machine learning (ML) solutions are either too complex or inefficient for practical use.

Innovation Solution

A supervised machine learning approach using a low-speed, high-resolution reference ADC to generate ground truth for training a neural network that continuously corrects static and dynamic errors in high-speed ADCs, employing a circuits-informed feature set and adaptive learning to achieve high accuracy and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional analog circuit design techniques are used in advanced technology nodes, then design simplicity is maintained, but accuracy deteriorates due to static and dynamic errors and mismatches

Engineering Contradiction:
ImproveADC accuracyVSAvoidcircuit design complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a machine learning model as an intermediary between the ADC hardware and the output data. The ML model learns the complex non-linear error patterns from training data and generates correction values that are applied to the ADC output, effectively mediating the relationship between the physical ADC circuit and the desired accurate digital output without modifying the ADC hardware itself

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional analog calibration circuits and correction mechanisms with a machine learning-based digital correction system. Instead of using analog components to physically adjust and compensate for errors, the system uses computational algorithms to learn and correct errors in the digital domain, substituting mechanical/analog correction with computational correction

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If calibration and correction techniques are applied to improve ADC accuracy, then measurement precision improves, but device complexity and power consumption increase

Engineering Contradiction:
ImproveADC accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The patent performs error correction in advance by training the machine learning model during a calibration phase using known reference inputs. The model learns the ADC's error characteristics beforehand and stores this knowledge in weight parameters. During normal operation, the pre-trained model quickly applies corrections without requiring continuous complex calibration computations, thereby reducing real-time power consumption while maintaining high accuracy

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If complex ML architectures are used to improve ADC correction accuracy, then measurement precision improves, but device complexity and area consumption increase

Engineering Contradiction:
Improvecorrection accuracyVSAvoidML model complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent employs a shallow neural network architecture with limited layers and nodes, applying partial action rather than using a deep complex model. The design recognizes that for ADC correction applications, a modest ML model with sufficient training data can achieve the necessary correction accuracy without the excessive complexity of deep architectures, thereby balancing accuracy requirements with hardware resource constraints

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250260410A1Machine learning enhanced analog-to-digital converters
Publication Date: 2025.08.14 THE ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIV OF ARIZONA
  • US20250260410A1 patent drawing
  • US20250260410A1 patent drawing
  • US20250260410A1 patent drawing

AI summary

Enhanced successive approximation register (SAR) analog-to-digital converters (ADCs). Embodiments in accordance with the present disclosure use a supervised machine learning (ML) technique that corrects both static errors, for example, but not limited to, capacitor mismatches, and dynamic errors, for example, but not limited to, due to reference ripple and kickbacks, as well as lower quantization error and comparator thermal noise, using a single correction technique. Embodiments use a low-speed reference ADC to learn a representation of the ADC errors and correct them in the backend.