SAR ADC Amplifier Switching for Higher Noise Immunity
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Solution Overview
Problem
Successive approximation register (SAR) analog-to-digital converters (ADCs) face challenges in noise immunity, particularly due to noise effects that can cause signal state changes greater than the least significant bit (LSB) resolution, leading to errors in output or limiting resolution, especially as they operate at higher speeds and with more output bits.
Innovation Solution
The implementation of auto-zeroing (AZ) sample phase noise suppression (AZSPNS) circuitry, which selectively adjusts the electrical attributes of the amplifier during the sample and conversion phases to reduce noise susceptibility, including changing the amplification stage bandwidth and capacitance, thereby improving noise immunity and reducing high-frequency noise storage during the sample phase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the reference voltage is adjusted to converge toward the input voltage in successive comparisons, then the output code accuracy is improved, but the differential between input and reference voltage becomes smaller and more susceptible to noise errors
Solution Approach 1:
The amplifier's electrical attributes are dynamically changed between sample phase and conversion phase. During sample phase, the amplifier has a first set of electrical attributes optimized for sampling, and during conversion phase, it has a second set of attributes optimized for accurate differential comparison with reduced noise susceptibility.
Solution Approach 2:
The amplifier's electrical attributes (such as bandwidth, gain, or other parameters) are changed between operating phases. This parameter change allows the amplifier to have different characteristics during sampling versus conversion, reducing noise impact on the small differentials while maintaining sampling performance.
2Productivity
If the SAR ADC operates at higher speeds with more output bits, then the productivity and resolution are improved, but noise effects cause signal state changes greater than LSB resolution leading to errors
Solution Approach 1:
The amplifier operates with different electrical attributes during sample phase versus conversion phase, allowing high-speed sampling followed by high-precision conversion. This dynamic switching enables the system to achieve both high productivity during sampling and high reliability during the comparison phase.
Solution Approach 2:
The conversion process is segmented into distinct phases (sample phase and conversion phase), each with optimized amplifier attributes. This segmentation allows the system to optimize for speed during sampling and for accuracy during conversion, resolving the contradiction between productivity and reliability.
3Object-affected harmful factors
If the amplifier electrical attributes are changed between sample and conversion phases, then noise immunity is improved, but the device complexity increases
Solution Approach 1:
The same amplifier is used for both sample phase and conversion phase operations. By making the amplifier multi-functional and capable of operating with different electrical attributes in different phases, the design avoids the need for separate amplifiers for each phase, thereby reducing overall device complexity while still achieving improved noise immunity.
Solution Approach 2:
Instead of using different amplifiers or complex circuitry, the solution changes the electrical parameters of the existing amplifier between phases. This approach achieves improved noise immunity through parameter modulation rather than through structural complexity.
Data Source
AI summary
A successive approximation analog-to-digital with an input for receiving an input analog voltage, and an amplifier with a first set of electrical attributes in a sample phase and a second set of electrical attributes, differing from the first set of electrical attributes, in a conversion phase.