SAR ADC Non-Latched Feedback Loop for High-Speed Conversion
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Solution Overview
Problem
SAR ADCs with trial decision feedback suffer from low conversion speed due to critical timing paths through latches, limiting their maximum operating frequency.
Innovation Solution
Implementing a direct decision feedback loop that bypasses latches by providing a non-latched feedback signal from the comparator output directly to the DAC, reducing the critical timing path and enhancing conversion speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If latched feedback signal is used in SAR ADC, then reliability of decision feedback is improved, but conversion speed deteriorates due to critical timing paths through latches
Solution Approach 1:
The feedback path is segmented into two separate paths: a latched path for reliability and a non-latched direct path for speed. The non-latched feedback signal bypasses the latches entirely, creating a parallel segmentation that allows the system to achieve high-speed operation without sacrificing feedback reliability through the alternative latched path.
Solution Approach 2:
A direct non-latched feedback path acts as an intermediary mechanism that transfers the comparison decision directly to the DAC input without passing through the latch circuitry. This intermediary path eliminates the timing constraints imposed by latches while the latched path continues to provide reliable feedback for normal operation.
2Speed
If direct decision feedback loop is implemented, then conversion speed is improved, but device complexity increases due to additional switch array
Solution Approach 1:
The array of switches is merged with the existing DAC structure, utilizing the same switch matrix that is already present in the SAR ADC for digital-to-analog conversion. This merging approach allows the non-latched feedback path to share hardware resources with the normal conversion path, thereby reducing the net increase in device complexity.
Solution Approach 2:
The switch array is designed to serve multiple functions: it controls the normal DAC operation during conversion and simultaneously provides the direct non-latched feedback path during decision feedback. This multi-functionality allows a single component to fulfill both roles, minimizing the additional complexity introduced by the direct feedback loop.
Data Source
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Figure 3
Figure 4A~4B
AI summary
Successive approximation register (SAR) analog-to-digital converters (ADCs) with direct decision feedback loops are disclosed herein. In certain embodiments, a SAR ADC includes a digital-to-analog converter (DAC) that generates an analog output signal, a comparator including an input that receives the analog output signal of the DAC and an output that generates a comparison signal, and an array of switches coupled to the output of the comparator and operable to provide a non-latched feedback signal to a digital input of the DAC.