SAR ADC Polarity-Dependent Offset for Lower Quantization Error
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Solution Overview
Problem
Optical communication systems face inefficiencies and noise effects that interfere with accurately recovering subcarrier signal data, leading to potential errors in optical system components.
Innovation Solution
Implementing a successive approximation register (SAR) analog-to-digital converter (ADC) circuit with a capacitive digital-to-analog converter (CDAC) that applies a polarity dependent offset to reduce quantization error and improve signal-to-quantization noise ratio (SQNR) by confining quantization error between -LSB/2 to LSB/2.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional SAR ADC circuit is used for signal conversion, then the conversion process is completed, but quantization error ranges from -LSB to +LSB causing SQNR degradation
Solution Approach 1:
The patent applies asymmetry by introducing a polarity-dependent offset that treats positive and negative input signals differently. For positive signals, an offset of +LSB/2 is added, while for negative signals, an offset of -LSB/2 is added. This asymmetric treatment shifts the quantization error distribution to be uniformly centered around zero, improving SQNR performance.
Solution Approach 2:
The patent changes the quantization parameter by dynamically adjusting the offset value based on signal polarity. The offset parameter is set to +LSB/2 for positive inputs and -LSB/2 for negative inputs, transforming the quantization error distribution from asymmetric (-LSB to +LSB) to symmetric and uniformly distributed (-LSB/2 to +LSB/2).
2Productivity
If optical system components process received subcarriers, then data communication is achieved, but inefficiencies and noise effects cause potential errors in signal recovery
Solution Approach 1:
The patent implements feedback by using the polarity information of the input signal to dynamically adjust the quantization offset. The system continuously monitors the input polarity and applies the appropriate offset (+LSB/2 or -LSB/2), creating a feedback loop that optimizes quantization performance and reduces errors in signal recovery.
Solution Approach 2:
The patent applies preliminary anti-action by pre-compensating for quantization errors through polarity-dependent offset addition before the quantization process. This preventive measure counteracts the expected quantization error distribution, ensuring more accurate signal recovery and reducing the impact of noise effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SAR ADC circuit enhances SQNR performance by reducing quantization error and improving signal recovery accuracy in optical communication systems.
Implementation Method 1
a capacitive digital-to-analog converter (CDAC) comprising a capacitive divider circuit, the capacitive divider circuit comprising (i) a first capacitor in parallel with a second capacitor in a first branch, (ii) a plurality of other capacitors in a plurality of other respective branches
Data Source
AI summary
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for implementing a SAR ADC circuit with improved quantization error. In some implementations, an apparatus includes an analog-to-digital converter (ADC) configured to receive a set of voltage signals and generate digital representations of signals. The ADC comprises a capacitive digital-to-analog converter (CDAC) comprising a capacitive divider circuit, the capacitive divider circuit comprising (i) a first capacitor in parallel with a second capacitor in a first branch, (ii) a plurality of capacitors in a plurality of other respective branches, and (iii) the CDAC configured to receive the set of sampled voltages and adjust each set of the sampled voltages by a first voltage or a second voltage through selection of one or more capacitors of the (i) first capacitor and the second capacitor and (ii) one or more of the plurality of capacitors.