SAR ADC Pre-Charge Capacitor Control for Low-Noise Conversion
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Solution Overview
Problem
High-resolution successive approximation register analog-digital converters are limited by noise from comparators and digital-to-analog converter switches, which affects their performance.
Innovation Solution
An analog-to-digital converter design incorporating a pre-charge capacitor and a control logic circuit that manages reference voltages and switch operations to reduce noise and improve conversion accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high-resolution successive approximation register analog-to-digital converter is used to improve conversion accuracy, then measurement precision is improved, but noise from the comparator and digital-to-analog converter switches increases
Solution Approach 1:
The patent applies preliminary action by pre-charging the capacitor connected to the comparing circuit before the actual conversion operation. The control logic circuit pre-charges the capacitor to a reference voltage level in advance, so that when the digital-to-analog converter switches operate during conversion, the capacitor is already at a stable voltage level. This preliminary charging action reduces the impact of switch noise on the conversion accuracy, allowing high-resolution conversion without being overly affected by noise from the comparator and switches.
2Measurement precision
If the capacitor in the comparing circuit is charged during each conversion operation, then conversion accuracy can be maintained, but power consumption increases and conversion speed decreases
Solution Approach 1:
The control logic circuit performs preliminary charging of the capacitor to the reference voltage before the conversion operation begins. This way, the capacitor does not need to be charged from zero during each conversion cycle, reducing the charging time and increasing conversion speed while maintaining accuracy.
Solution Approach 2:
The capacitor is charged periodically to the reference voltage at predetermined timing intervals controlled by the control logic circuit, rather than being continuously charged during each conversion operation. This periodic pre-charging approach reduces overall power consumption while ensuring the capacitor is ready for each conversion cycle, thereby improving both power efficiency and conversion speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the efficiency and speed of analog-to-digital conversion while reducing power consumption and noise interference, thereby improving the overall performance of the converter.
Implementation Method 1
a first pre-charge capacitor connected to a ground voltage, and a first pre-charge switch configured to operate in response to the control of the control logic circuit to connect the first pre-charge capacitor to one of the first filtering node or the first delivery node
Data Source
AI summary
Provided are an analog-to-digital converter and/or an operating method thereof. The analog-to-digital converter includes a sample/hold circuit, a digital-to-analog converter, a comparing circuit, and a control logic circuit, wherein the digital-to-analog converter includes a first capacitor connected to a first comparison node and a first filtering node, a first reference voltage switch connected to the first filtering node and connected to a first delivery node or a first transmission node, a first pre-charge switch connected to the first filtering node or the first delivery node, and a first pre-charge capacitor connected to the first pre-charge switch and a ground voltage.