SAR ADC Reference Switching for Lower Power and Latency
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Solution Overview
Problem
Conventional SAR ADCs use reference voltages equal to the maximum input voltage, which affects power consumption and latency due to the number of clock cycles required for conversion.
Innovation Solution
A SAR ADC design with a voltage reference generator that sets the reference voltage to approximately half the difference between the maximum and minimum input voltage, using a comparator and DAC to generate digital output words based on comparisons with this reference voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the reference voltage is set equal to the maximum input voltage, then the ADC can cover the full input voltage range, but the power consumption increases significantly
Solution Approach 1:
The patent implements dynamic reference voltage adjustment where the reference voltage is changed based on the detected input voltage range. The system uses range detection circuitry to identify whether the input signal is in a high or low voltage range, then selectively applies appropriate reference voltages (e.g., Vref_high or Vref_low) to optimize both measurement capability and power consumption for each range.
Solution Approach 2:
The system changes the reference voltage parameter dynamically based on operating conditions. By detecting the input voltage range and adjusting the reference voltage accordingly, the system achieves full-scale measurement capability when needed while reducing power consumption during normal operation by using lower reference voltages for lower input ranges.
2Measurement precision
If the reference voltage is set equal to the maximum input voltage, then the full input range can be measured, but the conversion latency increases due to more clock cycles required
Solution Approach 1:
The patent implements dynamic reference voltage adjustment where the reference voltage is changed based on the detected input voltage range. The system uses range detection circuitry to identify whether the input signal is in a high or low voltage range, then selectively applies appropriate reference voltages (e.g., Vref_high or Vref_low) to optimize both measurement capability and power consumption for each range.
Solution Approach 2:
The system changes the reference voltage parameter dynamically based on operating conditions. By detecting the input voltage range and adjusting the reference voltage accordingly, the system achieves full-scale measurement capability when needed while reducing power consumption during normal operation by using lower reference voltages for lower input ranges.
3Measurement precision
If a higher reference voltage is used in the CDAC, then the analog-to-digital conversion accuracy is maintained, but the power consumption increases
Solution Approach 1:
The patent implements dynamic reference voltage adjustment where the reference voltage is changed based on the detected input voltage range. The system uses range detection circuitry to identify whether the input signal is in a high or low voltage range, then selectively applies appropriate reference voltages (e.g., Vref_high or Vref_low) to optimize both measurement capability and power consumption for each range.
Solution Approach 2:
The system changes the reference voltage parameter dynamically based on operating conditions. By detecting the input voltage range and adjusting the reference voltage accordingly, the system achieves full-scale measurement capability when needed while reducing power consumption during normal operation by using lower reference voltages for lower input ranges.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and latency by optimizing the reference voltage, enabling efficient digital-to-analog conversions while maintaining accurate representation of analog input values.
Implementation Method 1
a comparator, including a first input terminal configured to receive the first voltage, and a second input terminal configured to receive a second voltage, where the comparator is configured to generate a comparator output voltage based on the first and second voltages, and where the comparator output voltage has a value corresponding with a sign of the difference between the first and second voltages
Implementation Method 2
a DAC, configured to receive the digital input word and an analog input voltage, and to generate a first voltage based on the analog input voltage and the digital input word
Data Source
AI summary
An ADC is disclosed. The ADC includes a SAR logic circuit, a DAC, a comparator, and a voltage generator. The voltage generator includes a first switch connected to the comparator configured to selectively connect a second input terminal of the comparator to a reference voltage, a capacitor connected to the second input terminal of the comparator, and a second switch connected to the capacitor and selectively connected to either of a ground voltage and the reference voltage. The second switch is configured to selectively connect the capacitor to either of the ground voltage and the reference voltage, and the SAR logic circuit is further configured to receive the comparator output voltage, and to generate a digital input word for the DAC based on one or more comparator output voltages received from the comparator.