SAR ADC Overlapping Reference Ranges for Lower Power Conversion
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Solution Overview
Problem
Conventional SAR ADC architectures use reference voltages equal to the maximum input voltage, which affects power consumption and latency due to the number of clock cycles required for conversion.
Innovation Solution
A SAR ADC with a reference voltage set to half the difference between the maximum and minimum input voltage, utilizing a comparator and DAC with capacitors and switches to generate digital representations of analog inputs by adjusting voltage levels based on comparator outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the reference voltage is set equal to the maximum input voltage, then the ADC can cover the full input voltage range, but power consumption increases and conversion latency increases
Solution Approach 1:
The patent changes the reference voltage parameter from the conventional maximum input voltage to a lower value that is still sufficient to cover the actual input range. This parameter optimization reduces power consumption while maintaining the ability to convert the required analog input signals accurately.
Solution Approach 2:
The patent applies partial action by using a reference voltage that is sufficient for the actual conversion needs but not excessively high. By setting the reference voltage to cover only the necessary range rather than the absolute maximum possible range, the system achieves adequate performance with reduced power consumption.
2Adaptability or versatility
If the reference voltage is set equal to the maximum input voltage, then the ADC can cover the full input voltage range, but conversion latency increases due to more clock cycles required
Solution Approach 1:
The patent optimizes the reference voltage parameter to reduce the number of clock cycles needed for conversion. By setting the reference voltage appropriately, the successive approximation process converges faster, reducing conversion latency while still covering the required input voltage range.
3Use of energy by moving object
If the reference voltage is reduced to optimize power consumption, then power consumption decreases, but measurement precision may be affected
Solution Approach 1:
The patent carefully selects the reference voltage parameter to find the optimal balance between power consumption and measurement precision. The reference voltage is reduced from the maximum input voltage to a lower value that still provides sufficient resolution and accuracy for the intended application, achieving power savings without compromising conversion precision.
Data Source
AI summary
An analog to digital converter (ADC) is disclosed. The ADC includes a DAC which generates a first signal based on an analog input and a digital input word, and a comparator which generates a comparator output having a value corresponding with a sign of a difference between first and second signals. During a first time period, the second signal is equal to a reference signal, the first signal is equal to an analog input, and the comparator generates a first comparator output. During a second time period, the second signal is equal to the reference signal, the first signal is equal to a the analog input plus a predetermined signal, and the comparator generates a second comparator output. A SAR logic circuit generates the digital input word for the DAC based on the first and second comparator outputs.